PIC18F4439-I/PT Microchip Technology, PIC18F4439-I/PT Datasheet - Page 279

• Manufacturer Part Number: PIC18F4439-I/PT
• Description: IC MCU FLASH 6KX16 EE A/D 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4439-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 12KB (6K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 640 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 640 B
• Interface Type: I2C, SPI, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• For Use With: 444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

FIGURE 23-13:
TABLE 23-12: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 1)
 2002 Microchip Technology Inc.
71
71A
72
72A
73
73A
74
75
76
78
79
80
81
Note 1: Requires the use of Parameter # 73A.
Param.
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SCK
SDO
SS
SCK
2: Only if Parameter # 71A and # 72A are used.
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TscR
TscF
TscH2doV,
TscL2doV
TdoV2scH,
TdoV2scL
B
Symbol
Refer to Figure 23-4 for load conditions.
2
B
SCK input high time
(Slave mode)
SCK input low time
(Slave mode)
Setup time of SDI data input to SCK edge
Last clock edge of Byte 1 to the 1st clock edge of Byte 2
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SCK output rise time (Master mode) PIC18FXXXX
SCK output fall time (Master mode) PIC18FXXXX
SDO data output valid after SCK
edge
SDO data output setup to SCK edge
EXAMPLE SPI MASTER MODE TIMING (CKE = 1)
81
73
MSb In
MSb
74
71
75, 76
80
Characteristic
72
bit6 - - - - - -1
bit6 - - - -1
Preliminary
Continuous
Single Byte
Continuous
Single Byte
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
PIC18LFXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
LSb In
LSb
1.25 T
1.25 T
1.5 T
79
78
Min
100
100
T
40
40
CY
—
—
—
—
—
—
—
—
—
—
CY
CY
CY
+ 40
PIC18FXX39
+ 30
+ 30
Max Units Conditions
150
25
60
25
60
25
60
25
60
50
—
—
—
—
—
—
—
—
DS30485A-page 277
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
V
V
V
V
V
DD
DD
DD
DD
DD
= 2V
= 2V
= 2V
= 2V
= 2V