C8051F505-IQ Silicon Laboratories Inc, C8051F505-IQ Datasheet - Page 49

• Manufacturer Part Number: C8051F505-IQ
• Description: IC 8051 MCU 32K FLASH 48-QFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F50xr

Specifications of C8051F505-IQ

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-QFP
• Mfg Application Notes: LIN Bootloader AppNote
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 40
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 32x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F500DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 32-ch x 12-bit
• Package: 48PQFP
• Device Core: 8051
• Family Name: C8051F50x
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1527 - KIT DEV FOR C8051F50X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1520

Table 5.9. ADC0 Electrical Characteristics
VDDA
DC Accuracy
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Full Scale Error
Offset Temperature Coefficient
Dynamic performance (10 kHz sine-wave single-ended input, 1 dB below Full Scale, 200 ksps)
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Spurious-Free Dynamic Range
Conversion Rate
SAR Conversion Clock
Conversion Time in SAR Clocks
Track/Hold Acquisition Time
Throughput Rate
Analog Inputs
ADC Input Voltage Range
Absolute Pin Voltage with
Respect to GND
Sampling Capacitance
Input Multiplexer Impedance
Power Specifications
Power Supply Current 
(VDDA supplied to ADC0)
Burst Mode (Idle)
Power-On Time
Power Supply Rejection Ratio
Notes:
1. Represents one standard deviation from the mean. Offset and full-scale error can be removed
2. An additional 2 FCLK cycles are required to start and complete a conversion
3. Additional tracking time may be required depending on the output impedance connected to the ADC input.
4. An increase in tracking time will decrease the ADC throughput.
5. See Section “
= 1.8 to 2.75 V, –40 to +125 °C, VREF = 1.5 V (REFSL=0) unless otherwise specified.
through calibration.
See Section “
Parameter
1
4
6.2.1. Settling Time Requirements
6.3. Selectable Gain
5
3
2
Operating Mode, 200 ksps
Guaranteed Monotonic
Up to the 5th harmonic
” on page
gain = 1.0 (default)
VDDA > 2.0 V
VDDA < 2.0 V
VDDA > 2.0 V
Conditions
gain = n
58
Rev. 1.2
for more information about the setting the gain.
” on page
57
.
Min
–10
–20
1.5
3.5
63
13
—
—
—
—
—
—
—
—
—
—
—
—
0
0
0
5
C8051F50x/F51x
1100
1100
±0.5
±0.5
–1.8
Typ
–84
1.7
-60
–2
66
82
32
—
—
—
—
—
—
—
3
12
VREF/n
VREF
1500
1500
Max
200
V
3.6
10
20
±3
±1
—
—
—
—
—
—
—
—
—
—
IO
ppm/°C
clocks
Units
MHz
ksps
LSB
LSB
LSB
LSB
bits
k
dB
dB
dB
pF
µA
µA
dB
µs
µs
V
V
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