PIC12C508/JW Microchip Technology, PIC12C508/JW Datasheet - Page 50

IC MCU EPROM 512X12 8CDIP

PIC12C508/JW

Manufacturer Part Number
PIC12C508/JW
Description
IC MCU EPROM 512X12 8CDIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr

Specifications of PIC12C508/JW

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
768B (512 x 12)
Program Memory Type
EPROM, UV
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-CDIP (0.300", 7.62mm) Window
For Use With
DVMCPA - KIT DVR BOARD EVAL SYSTEM MXDEV1DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
PIC12C5XX
BSF
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
BTFSC
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
DS40139E-page 50
Before Instruction
After Instruction
Before Instruction
After Instruction
FLAG_REG = 0x0A
FLAG_REG = 0x8A
PC
if FLAG<1>
PC
if FLAG<1>
PC
Bit Set f
[ label ] BSF
0
0
1
Bit ’b’ in register ’f’ is set.
1
1
BSF
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0
0
skip if (f<b>) = 0
If bit ’b’ in register ’f’ is 0 then the next
instruction is skipped.
If bit ’b’ is 0 then the next instruction
fetched during the current instruction
execution is discarded, and an NOP is
executed instead, making this a 2 cycle
instruction.
1
1(2)
HERE
FALSE
TRUE
0110
0101
f
b
f
b
=
=
=
=
=
(f<b>)
31
31
7
7
FLAG_REG,
BTFSC
GOTO
address (HERE)
0,
address (TRUE);
1,
address(FALSE)
bbbf
bbbf
f,b
FLAG,1
PROCESS_CODE
ffff
ffff
7
BTFSS
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
Before Instruction
After Instruction
PC
If FLAG<1>
PC
if FLAG<1>
PC
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
If bit ’b’ in register ’f’ is ’1’ then the next
instruction is skipped.
If bit ’b’ is ’1’, then the next instruction
fetched during the current instruction
execution, is discarded and an NOP is
executed instead, making this a 2 cycle
instruction.
1
1(2)
HERE
FALSE
TRUE
0111
f
b < 7
=
=
=
=
=
31
1999 Microchip Technology Inc.
BTFSS
GOTO
address (HERE)
0,
address (FALSE);
1,
address (TRUE)
bbbf
FLAG,1
PROCESS_CODE
ffff

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