PIC16C620A-04/SS Microchip Technology, PIC16C620A-04/SS Datasheet - Page 42

• Manufacturer Part Number: PIC16C620A-04/SS
• Description: IC MCU OTP 512X14 COMP 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C620A-04/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 13
• Program Memory Size: 896B (512 x 14)
• Program Memory Type: OTP
• Ram Size: 96 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SSOP
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 96 B
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• For Use With: 309-1016 - ADAPTER 20-SSOP TO 18-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16C62X
7.4
Response time is the minimum time, after selecting a
new reference voltage or input source, before the
comparator output has a valid level. If the internal
reference is changed, the maximum delay of the
internal voltage reference must be considered when
using the comparator outputs. Otherwise the maximum
delay of the comparators should be used (Table 12-2).
FIGURE 7-3:
DS30235J-page 40
Comparator Response Time
COMPARATOR OUTPUT BLOCK DIAGRAM
To RA3 or
RA4 Pin
Set
CMIF
Bit
Bus
Data
RD CMCON
F
O
C
ROM
OMPARATOR
THER
Q
Q
EN
D
CL
7.5
The comparator outputs are read through the CMCON
register. These bits are read only. The comparator
outputs may also be directly output to the RA3 and RA4
I/O pins. When the CM<2:0> = 110, multiplexors in the
output path of the RA3 and RA4 pins will switch and the
output of each pin will be the unsynchronized output of
the comparator. The uncertainty of each of the
comparators is related to the input offset voltage and the
response time given in the specifications. Figure 7-3
shows the comparator output block diagram.
The TRISA bits will still function as an output enable/
disable for the RA3 and RA4 pins while in this mode.
EN
Note 1: When reading the PORT register, all pins
D
NRESET
Comparator Outputs
2: Analog levels on any pin that is defined as
RD CMCON
configured as analog inputs will read as a
‘0’. Pins configured as digital inputs will
convert an analog input according to the
Schmitt Trigger input specification.
a digital input may cause the input buffer
to consume more current than is
specified.
MULTIPLEX
P
ORT
+
P
INS
-
 2003 Microchip Technology Inc.