PIC18F45K20-I/P Microchip Technology, PIC18F45K20-I/P Datasheet - Page 63
![IC PIC MCU FLASH 16KX16 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F45K20-I/P
Manufacturer Part Number
PIC18F45K20-I/P
Description
IC PIC MCU FLASH 16KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(12 pages)
3.PIC18F25K20T-ISS.pdf
(14 pages)
4.PIC18F25K20T-ISS.pdf
(456 pages)
5.PIC18F45K20-IPT.pdf
(78 pages)
6.PIC18F26K20-ISO.pdf
(430 pages)
Specifications of PIC18F45K20-I/P
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F45K20-I/P
Manufacturer:
NEC
Quantity:
2 110
Company:
Part Number:
PIC18F45K20-I/PT
Manufacturer:
SIEMENS
Quantity:
32
Company:
Part Number:
PIC18F45K20-I/PT
Manufacturer:
MICROCHI
Quantity:
18 600
Company:
Part Number:
PIC18F45K20-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F45K20-I/PT
Manufacturer:
MICR0CHIP
Quantity:
20 000
© 2009 Microchip Technology Inc.
A read of an EEPROM byte begins by clearing the EEPGD bit in EECON1. This selects
the data EEPROM array for access. The CFGS bit should also be cleared during an
EEPROM access; it is only set to access the Configuration bit locations.
The byte address of the data EEPROM location to be read is loaded into the EEADR
register. The RD bit in EECON1 is then set to execute the read. On the next instruction
cycle, the value of the read EEPROM location is available in the EEDATA register.
Figure 3-50 shows a function that reads a byte of EEPROM.
FIGURE 3-50:
3.10.2
Similar to a read, a write to the internal EEPROM must clear the EEPGD and CFGS
bits in EECON1 to access the internal EEPROM array. The data value to be written is
then written to the EEDATA register. The address of the byte to be written is loaded into
EEADR.
Before a write can take place, the WREN bit in EECON1 must be set, or the write will
not occur. It is also necessary to write a sequence of two bytes, values 0x55 and 0xAA
to EECON2 immediately before beginning the write by setting the WR bit in EECON1.
Both the WREN bit and the EECON2 sequence are to protect against inadvertent
writes to EEPROM and ensure the integrity of EEPROM values.
The three step sequence of:
must be completed in this order, without other statements or interruptions or the write
will not execute. Therefore, if interrupts are enabled, they should be disabled before the
sequence and re-enabled after the WR bit is set.
EEPROM writes take some time to erase and program the byte in the array. This time
is listed as parameter D122 in the data sheet Section 26.0 “Electrical Characteristics”,
and is usually several ms. During this time, the PIC18F45K20 microcontroller continues
to execute program code. The program may determine when a write has completed by
polling or by an interrupt generated by the EEPROM module.
In the example write function in Figure 3-49, the code waits for the EEPROM write to
complete by polling the WR bit of EECON1. When the write is complete, this bit will be
cleared. Alternatively, the program can be alerted that the write has been completed
with an interrupt. The EEPROM module will set the EEIF bit in PIR2 when the write
completes.
unsigned
{ // reads and returns the EEPROM byte value at the address given
}
EECON2 = 0x55;
EECON2 = 0xAA;
EECON1bits.WR = 1;
// given in "address".
//needed.
return
//The value read is ready the next instruction cycle in EEDATA.
EECON1bits.EEPGD
EECON1bits.CFGS=
EEADR
//
EECON1bits.RD
execute
Writing a data byte to EEPROM
char
=
EEDATA;
address;//Load
EEPROM_Read(unsigned
the
PICkit™ 3 Debug Express Lessons
=
DATA EEPROM READ
=
0;//
read
1;//Set
0;//
Do
EEADRwith
Set
the
notaccessConfigregisters
toaccessEEPROMmemory
RDbit
char
address
to
address)
execute
of
location
the
EEPROM
to
write.
read
DS41370C-page 59
No wait is