PIC18F65J90-I/PT Microchip Technology, PIC18F65J90-I/PT Datasheet - Page 9

• Manufacturer Part Number: PIC18F65J90-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 51
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183030
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

• Bits 6, 5 and 4 are renamed In the following
TABLE 17-2:
TABLE 17-5:
TABLE 17-6:
© 2008 Microchip Technology Inc.
TXSTA1
RCSTA1
BAUDCON1
SPBRGH1
SPBRG1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the BRG.
INTCON
PIR1
PIE1
IPR1
RCSTA1
TXREG1
TXSTA1
BAUDCON1
SPBRGH1
SPBRG1
LATG
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
INTCON
PIR1
PIE1
IPR1
RCSTA1
RCREG1
TXSTA1
BAUDCON1
SPBRGH1
SPBRG1
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
tables:
- Table 17-2: Registers Associated with the
Name
Name
Name
Baud Rate Generator
EUSART Transmit Register
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
GIE/GIEH PEIE/GIEL TMR0IE
EUSART Receive Register
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
GIE/GIEH PEIE/GIEL TMR0IE
ABDOVF
ABDOVF
ABDOVF
CSRC
CSRC
SPEN
U2OD
CSRC
SPEN
SPEN
Bit 7
Bit 7
Bit 7
REGISTERS ASSOCIATED WITH THE BAUD RATE GENERATOR
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
—
—
—
—
—
—
RCIDL
RCIDL
Bit 6
U1OD
RCIDL
RX9
TX9
ADIF
ADIE
ADIP
Bit 6
ADIE
ADIP
ADIF
RX9
TX9
Bit 6
RX9
TX9
RXDTP
SREN
TXEN
Bit 5
RXDTP
RXDTP
RC1IE
RC1IP
RC1IF
SREN
TXEN
RC1IF
RC1IE
RC1IP
SREN
TXEN
Bit 5
Bit 5
—
TXCKP
SYNC
CREN
Bit 4
TXCKP
TXCKP
INT0IE
LATG4
INT0IE
CREN
TX1IF
TX1IE
TX1IP
SYNC
TX1IE
TX1IP
CREN
SYNC
TX1IF
Bit 4
Bit 4
SENDB
ADDEN
BRG16
Bit 3
PIC18F85J90 FAMILY
ADDEN
ADDEN
SENDB
SENDB
BRG16
BRG16
LATG3
SSPIF
SSPIE
SSPIP
SSPIF
SSPIE
SSPIP
RBIE
RBIE
Bit 3
Bit 3
- Table 17-5: Registers Associated with
- Table 17-6: Registers Associated with
Asynchronous Transmission
Asynchronous Reception
BRGH
FERR
Bit 2
—
TMR0IF
TMR0IF
LATG2
BRGH
BRGH
FERR
FERR
Bit 2
Bit 2
—
—
—
—
—
—
—
—
OERR
TRMT
WUE
Bit 1
TMR2IE
TMR2IP
TMR2IF
TMR2IF
TMR2IE
TMR2IP
INT0IF
INT0IF
LATG1
OERR
TRMT
OERR
TRMT
WUE
Bit 1
WUE
Bit 1
ABDEN
RX9D
TX9D
Bit 0
TMR1IF
TMR1IE
TMR1IP
ABDEN
TMR1IE
TMR1IP
TMR1IF
ABDEN
LATG0
RX9D
TX9D
RX9D
TX9D
RBIF
Bit 0
RBIF
Bit 0
Reset Values
80286E-page 9
on Page
53
53
55
55
53
on Page
on Page
Values
Values
Reset
Reset
51
54
54
54
53
53
53
55
55
53
51
54
54
54
53
53
53
55
55
53
54