PIC24FJ32GA004-I/PT Microchip Technology, PIC24FJ32GA004-I/PT Datasheet - Page 142

• Manufacturer Part Number: PIC24FJ32GA004-I/PT
• Description: IC PIC MCU FLASH 11KX24 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ32GA004-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (11K x 24)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, DM300027, DV164033, MA240013, AC164127, DM240002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Controller Family/series: PIC24
• No. Of I/o's: 35
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164335 - MODULE SKT FOR 10X10 PM3 44TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJ64GA004 FAMILY
FIGURE 14-3:
FIGURE 14-4:
DS39881C-page 140
Note
PROCESSOR 1 (SPI Enhanced Buffer Master)
Note
1:
2:
1:
2:
PROCESSOR 1 (SPI Master)
MSTEN (SPIxCON1<5>) = 1 and
Using the SSx pin in Slave mode of operation is optional.
User must write transmit data to read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are memory
mapped to SPIxBUF.
SPIBEN (SPIxCON2<0>) = 1
MSTEN (SPIxCON1<5>) = 1)
Using the SSx pin in Slave mode of operation is optional.
User must write transmit data to read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are memory
mapped to SPIxBUF.
MSb
MSb
SPI MASTER/SLAVE CONNECTION (STANDARD MODE)
SPI MASTER/SLAVE CONNECTION (ENHANCED BUFFER MODES)
8-Level FIFO Buffer
Serial Transmit Buffer
Serial Receive Buffer
Shift Register
(SPIxBUF)
SPIx Buffer
(SPIxSR)
(SPIxRXB)
Shift Register
(SPIxBUF)
(SPIxTXB)
SPIx Buffer
(SPIxSR)
(2)
(2)
(2)
(2)
LSb
LSb
SDOx
SCKx
SDIx
SDOx
SDIx
SCKx
SSx
Preliminary
Serial Clock
Serial Clock
SSEN (SPIxCON1<7>) = 1 and MSTEN (SPIxCON1<5>) = 0
SDIx
SDOx
SCKx
SSx
SCKx
SDIx
SDOx
SSx
PROCESSOR 2 (SPI Enhanced Buffer Slave)
(1)
(1)
PROCESSOR 2 (SPI Slave)
MSb
Serial Transmit Buffer
Serial Receive Buffer
MSTEN (SPIxCON1<5>) = 0 and
SSEN (SPIxCON1<7>) = 1,
SPIBEN (SPIxCON2<0>) = 1
Shift Register
(SPIxRXB)
(SPIxTXB)
(SPIxBUF)
SPIx Buffer
MSb
(SPIxSR)
8-Level FIFO Buffer
Shift Register
(SPIxBUF)
SPIx Buffer
(SPIxSR)
(2)
(2)
(2)
© 2008 Microchip Technology Inc.
LSb
(2)
LSb