PIC18F2439-I/SP Microchip Technology, PIC18F2439-I/SP Datasheet - Page 232

IC MCU FLASH 6KX16 EE A/D 28DIP

PIC18F2439-I/SP

Manufacturer Part Number
PIC18F2439-I/SP
Description
IC MCU FLASH 6KX16 EE A/D 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2439-I/SP

Core Size
8-Bit
Program Memory Size
12KB (6K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
640 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
21
Eeprom Memory Size
256Byte
Ram Memory Size
640Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
640 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
PIC18FXX39
DAW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example1:
Example 2:
DS30485A-page 230
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
W
C
DC
W
C
DC
W
C
DC
W
C
DC
Q1
=
=
=
=
=
=
=
=
=
=
=
=
register W
Decimal Adjust W Register
[ label ] DAW
None
If [W<3:0> >9] or [DC = 1] then
(W<3:0>) + 6 → W<3:0>;
else
(
If [W<7:4> >9] or [C = 1] then
(
else
(W<7:4>) → W<7:4>;
C
DAW adjusts the eight-bit value in
W, resulting from the earlier addi-
tion of two variables (each in
packed BCD format) and produces
a correct packed BCD result.
1
1
DAW
W<3:0>) → W<3:0>;
W<7:4>) + 6 → W<7:4>;
Read
0000
Q2
0xA5
0
0
0x05
1
0
0xCE
0
0
0x34
1
0
0000
Process
Data
Q3
0000
Write
Q4
W
0111
Preliminary
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
CNT
Z
CNT
Z
Q1
=
=
=
=
register 'f'
Decrement f
[ label ] DECF f [,d [,a]
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f) – 1 → dest
C, DC, N, OV, Z
Decrement register 'f'. If 'd' is 0, the
result is stored in W. If 'd' is 1, the
result is stored back in register 'f'
(default). If ‘a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ = 1, then the
bank will be selected as per the
BSR value (default).
1
1
DECF
Read
0000
Q2
0x01
0
0x00
1
 2002 Microchip Technology Inc.
CNT,
01da
Process
Data
Q3
1, 0
ffff
destination
Write to
Q4
ffff

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