PIC24FJ256GA110-I/PT Microchip Technology, PIC24FJ256GA110-I/PT Datasheet
PIC24FJ256GA110-I/PT
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PIC24FJ256GA110-I/PT Summary of contents
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... PIC24FJ256GA110 Family Silicon Errata and Data Sheet Clarification The PIC24FJ256GA110 family devices that you have received conform functionally to the current Device Data Sheet (DS39905D), except for the anomalies described in this document. The silicon issues discussed in the following pages are for silicon revisions with the Device and Revision IDs ...
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... PIC24FJ256GA110 FAMILY TABLE 2: SILICON ISSUE SUMMARY Module Feature Number Core RAM Operation Core BOR Device JTAG Programming UART — I/O PORTB SPI Master mode CTMU — UART UERIF Interrupt UART FIFO Error Flags SPI Enhanced Buffer modes ® UART IrDA ...
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... Affected Silicon Revisions 2010 Microchip Technology Inc. PIC24FJ256GA110 FAMILY 3. Module: JTAG (Device Programming) The JTAGEN Configuration bit can be pro- grammed to ‘0’ while using the JTAG interface for device programming. This may cause a situation where JTAG programming can lock itself out of being able to program the device ...
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... PIC24FJ256GA110 FAMILY 6. Module: SPI (Master Mode) In Master mode, both the SPI Interrupt Flag (SPIxIF) and the SPIRBF bit (SPIxSTAT<0>) may become set one-half clock cycle early, instead of on the clock edge. This occurs only under the following circumstances: • Enhanced Buffer mode is disabled ...
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... Full Buffer Interrupt mode. Affected Silicon Revisions 2010 Microchip Technology Inc. PIC24FJ256GA110 FAMILY 11. Module: UART (IrDA When the UART is operating in 8-bit mode (PDSEL<1:0> = 0x) and using the IrDA endec (IREN = 1), the module incorrectly transmits a data payload of 80h as 00h. ...
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... PIC24FJ256GA110 FAMILY 14. Module: Core (Instruction Set instruction producing a read-after-write stall condition is executed inside a REPEAT loop, the instruction will be executed fewer times than was intended. For example, this loop: repeat #0xf inc [w1],[++w1] will execute less than 15 times. Work around Avoid using REPEAT to repetitively execute instructions that create a stall condition ...
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... Do not set bits, A<7:1>, of the module’s slave address equal to ‘1111xxx’ or ‘0000xxx’. Affected Silicon Revisions 2010 Microchip Technology Inc. PIC24FJ256GA110 FAMILY 20. Module: A/D Converter When using PGEC1 and PGED1 to debug an application on any 64-pin devices in this family, all voltage references will be disabled. This includes ...
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... PIC24FJ256GA110 FAMILY 22. Module: Core (Code Protection) When General Segment Code Protection has been enabled (GCP Configuration bit is pro- grammed), applications are unable to write to the first 512 bytes of the program memory space (0000h through 0200h). In applications that may require the interrupt vectors to be changed during run time, such as bootloaders, modifications to the interrupt vector tables will not be possible ...
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... It is the user’s responsibility to determine an appropriate register for the particular application. Affected Silicon Revisions 2010 Microchip Technology Inc. PIC24FJ256GA110 FAMILY 28. Module: A/D Converter Once the A/D (AD1CON1<15> = 1), it may continue to draw extra current even if the module is later disabled (AD1CON1<15> = 0). ...
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... PIC24FJ256GA110 FAMILY Data Sheet Clarifications The following typographic corrections and clarifications are to be noted for the latest version of the device data sheet (DS39905D): Corrections are shown in bold. Where Note: possible, the original bold text formatting has been removed for clarity. 1. Module: Guidelines for Getting Started with 16-Bit Microcontrollers Section 2 ...
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... Microchip Technology Inc. PIC24FJ256GA110 FAMILY In addition to temperature tolerance, the effective capacitance of large value ceramic capacitors can vary substantially, based on the amount of DC voltage applied to the capacitor ...
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... PIC24FJ256GA110 FAMILY APPENDIX A: DOCUMENT REVISION HISTORY Rev A Document (2/2008) First revision of this document. Includes silicon issues 1 (Core, RAM Operation), 2 (Core, BOR), 3 (JTAG, Programming), 4 (UART), 5 (I/O, PORTB), 6 (SPI) and 7 (Input Capture). Rev B Document (4/2008) Revised silicon issues 7 to clarify the requirement for latency compensation. Added silicon issues 8 (UART – ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-213-7830 Fax: 886-7-330-9305 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 2010 Microchip Technology Inc. 08/04/10 ...