PIC16F877-20I/L Microchip Technology, PIC16F877-20I/L Datasheet - Page 24

IC MCU FLASH 8KX14 EE 44PLCC

PIC16F877-20I/L

Manufacturer Part Number
PIC16F877-20I/L
Description
IC MCU FLASH 8KX14 EE 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F877-20I/L

Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Controller Family/series
PIC16F
No. Of I/o's
33
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Embedded Interface Type
I2C, PSP, SPI, USART
A/d Converter
10 Bits
No. Of Timers 8/12/16/32 Bits
2 / 0 / 1 / 0
Interface
I2C, PSP, SPI, USART
Rohs Compliant
No
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP, PSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164309 - MODULE SKT FOR PM3 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCC309-1040 - ADAPTER 44-PLCC ZIF TO 40-DIP309-1039 - ADAPTER 44-PLCC TO 40-DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
 Details

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PIC16F87X
2.2.2.5
The PIR1 register contains the individual flag bits for
the peripheral interrupts.
REGISTER 2-5:
DS30292C-page 22
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PIR1 Register
PIR1 REGISTER (ADDRESS 0Ch)
bit 7
PSPIF
1 = A read or a write operation has taken place (must be cleared in software)
0 = No read or write has occurred
ADIF: A/D Converter Interrupt Flag bit
1 = An A/D conversion completed
0 = The A/D conversion is not complete
RCIF: USART Receive Interrupt Flag bit
1 = The USART receive buffer is full
0 = The USART receive buffer is empty
TXIF: USART Transmit Interrupt Flag bit
1 = The USART transmit buffer is empty
0 = The USART transmit buffer is full
SSPIF: Synchronous Serial Port (SSP) Interrupt Flag
1 = The SSP interrupt condition has occurred, and must be cleared in software before returning
0 = No SSP interrupt condition has occurred.
CCP1IF: CCP1 Interrupt Flag bit
Capture mode:
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare mode:
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM mode:
Unused in this mode
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1 = TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
TMR1IF: TMR1 Overflow Interrupt Flag bit
1 = TMR1 register overflowed (must be cleared in software)
0 = TMR1 register did not overflow
Note 1: PSPIF is reserved on PIC16F873/876 devices; always maintain this bit clear.
Legend:
R = Readable bit
- n = Value at POR
PSPIF
R/W-0
• SPI
• I
• I
from the Interrupt Service Routine. The conditions that will set this bit are:
(1)
2
2
(1)
C Master
- A transmission/reception has taken place.
C Slave
- A transmission/reception has taken place.
- A transmission/reception has taken place.
- The initiated START condition was completed by the SSP module.
- The initiated STOP condition was completed by the SSP module.
- The initiated Restart condition was completed by the SSP module.
- The initiated Acknowledge condition was completed by the SSP module.
- A START condition occurred while the SSP module was idle (Multi-Master system).
- A STOP condition occurred while the SSP module was idle (Multi-Master system).
: Parallel Slave Port Read/Write Interrupt Flag bit
R/W-0
ADIF
W = Writable bit
’1’ = Bit is set
RCIF
R-0
TXIF
R-0
Note:
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
SSPIF
R/W-0
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate interrupt
bits are clear prior to enabling an interrupt.
CCP1IF
R/W-0
2001 Microchip Technology Inc.
x = Bit is unknown
TMR2IF
R/W-0
TMR1IF
R/W-0
bit 0

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