PIC18F8720T-I/PT Microchip Technology, PIC18F8720T-I/PT Datasheet - Page 375
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PIC18F8720T-I/PT
Manufacturer Part Number
PIC18F8720T-I/PT
Description
IC MCU FLASH 64KX16 W/AD 80-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F8520T-IPT.pdf
(380 pages)
3.PIC18F8520T-IPT.pdf
(40 pages)
4.PIC18F6620-IPT.pdf
(14 pages)
5.PIC18F6620-IPT.pdf
(12 pages)
Specifications of PIC18F8720T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
68
Number Of Timers
2 x 8 bit
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183032, DM183022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8720T-I/PT
Manufacturer:
RENESAS
Quantity:
1 001
Company:
Part Number:
PIC18F8720T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
TRISE Register
TSTFSZ ........................................................................... 299
Two-Word Instructions
TXSTA Register
2004 Microchip Technology Inc.
I
I
I
I
I
I
I
Low-Voltage Detect .................................................. 236
Master SSP I
Master SSP I
Parallel Slave Port (PIC18F8X20) ........................... 329
Program Memory Read ............................................ 324
Program Memory Write ............................................ 325
PWM Output ............................................................ 154
Repeat Start Condition ............................................. 186
Reset, Watchdog Timer (WDT),
Slave Mode General Call Address Sequence
Slave Synchronization ............................................. 163
Slow Rise Time (MCLR Tied to V
SPI Mode (Master Mode) ......................................... 162
SPI Mode (Slave Mode with CKE = 0) ..................... 164
SPI Mode (Slave Mode with CKE = 1) ..................... 164
Stop Condition Receive or Transmit Mode .............. 190
Synchronous Reception
Synchronous Transmission ...................................... 209
Synchronous Transmission (Through TXEN) .......... 209
Time-out Sequence on POR w/PLL Enabled
Time-out Sequence on Power-up
Time-out Sequence on Power-up (MCLR Tied
Timer0 and Timer1 External Clock .......................... 327
Timing for Transition Between Timer1 and
Transition Between Timer1 and OSC1
Transition Between Timer1 and OSC1 (RC, EC) ....... 27
Transition from OSC1 to Timer1 Oscillator ................ 26
USART Asynchronous Reception ............................ 207
USART Asynchronous Transmission ....................... 205
USART Asynchronous Transmission
USART Synchronous Receive ( Master/Slave) ....... 339
USART Synchronous Transmission
Wake-up from Sleep via Interrupt ............................ 253
PSPMODE Bit .................................................. 111, 128
Example Cases .......................................................... 46
BRGH Bit ................................................................. 200
2
2
2
2
2
2
2
C Master Mode First Start Bit Timing .................... 185
C Slave Mode (10-bit Reception, SEN = 0) ........... 174
C Slave Mode (10-bit Reception, SEN = 1) ........... 179
C Slave Mode (10-bit Transmission) ..................... 175
C Slave Mode (7-bit Reception, SEN = 0) ............. 172
C Slave Mode (7-bit Reception, SEN = 1) ............. 178
C Slave Mode (7-bit Transmission) ....................... 173
Oscillator Start-up Timer (OST) and
Power-up Timer (PWRT) ................................. 326
(7 or 10-bit Address Mode) .............................. 180
via 1 kOhm Resistor) ......................................... 38
(Master Mode, SREN) ..................................... 210
(MCLR Tied to V
(MCLR Not Tied to V
Case 1 ............................................................... 37
Case 2 ............................................................... 37
to V
OSC1 (HS with PLL) .......................................... 27
(HS, XT, LP) ...................................................... 26
(Back to Back) ................................................. 205
(Master/Slave) ................................................. 339
DD
via 1 kOhm Resistor) .............................. 37
2
2
C Bus Data ........................................ 337
C Bus Start/Stop Bits ........................ 337
PIC18F6520/8520/6620/8620/6720/8720
DD
via 1 kOhm Resistor) ......... 38
DD
)
DD
U
Universal Synchronous Asynchronous Receiver
USART
USART Synchronous Receive Requirements ................. 339
USART Synchronous Transmission Requirements ......... 339
V
Voltage Reference Specifications .................................... 317
W
Wake-up from Sleep ................................................ 239, 252
Watchdog Timer (WDT) ........................................... 239, 250
WCOL .............................................................................. 185
WCOL Status Flag ................................... 185, 186, 187, 190
WDT Postscaler ............................................................... 250
WWW, On-Line Support ...................................................... 5
X
XORLW ........................................................................... 299
XORWF ........................................................................... 300
Transmitter. See USART.
Asynchronous Mode ................................................ 204
Baud Rate Generator (BRG) ................................... 200
Serial Port Enable (SPEN Bit) ................................. 197
Synchronous Master Mode ...................................... 208
Synchronous Slave Mode ........................................ 211
Using Interrupts ....................................................... 252
Associated Registers ............................................... 251
Control Register ....................................................... 250
Postscaler ................................................................ 251
Programming Considerations .................................. 250
RC Oscillator ........................................................... 250
Time-out Period ....................................................... 250
Associated Registers, Receive ........................ 207
Associated Registers, Transmit ....................... 205
Receiver .......................................................... 206
Setting up 9-bit Mode with Address Detect ..... 206
Transmitter ...................................................... 204
Associated Registers ....................................... 200
Baud Rate Error, Calculating ........................... 200
Baud Rate Formula ......................................... 200
Baud Rates for Asynchronous Mode
Baud Rates for Asynchronous Mode
Baud Rates for Synchronous Mode ................. 201
High Baud Rate Select (BRGH Bit) ................. 200
Sampling ......................................................... 200
Associated Registers, Reception ..................... 210
Associated Registers, Transmit ....................... 208
Reception ........................................................ 210
Transmission ................................................... 208
Associated Registers, Receive ........................ 212
Associated Registers, Transmit ....................... 211
Reception ........................................................ 212
Transmission ................................................... 211
(BRGH = 0) .............................................. 202
(BRGH = 1) .............................................. 203
DS39609B-page 373