PIC18F6722-I/PT Microchip Technology, PIC18F6722-I/PT Datasheet

PIC18F6722-I/PT

Manufacturer Part Number

PIC18F6722-I/PT

Description

IC PIC MCU FLASH 64KX16 64TQFP

Manufacturer

Microchip Technology

Series

PIC® 18Fr

Datasheets

1.PIC16F616T-ISL.pdf (8 pages)

2.DV164136.pdf (6 pages)

3.DV164136.pdf (446 pages)

4.PIC18F8627T-IPT.pdf (44 pages)

5.PIC18LF6627-IPT.pdf (16 pages)

6.PIC18F8622-IPT.pdf (448 pages)

Specifications of PIC18F6722-I/PT

Program Memory Type

FLASH

Program Memory Size

128KB (64K x 16)

Package / Case

64-TFQFP

Core Processor

PIC

Core Size

8-Bit

Speed

40MHz

Connectivity

I²C, SPI, UART/USART

Peripherals

Brown-out Detect/Reset, HLVD, POR, PWM, WDT

Number Of I /o

Eeprom Size

1K x 8

Ram Size

3.8K x 8

Voltage - Supply (vcc/vdd)

4.2 V ~ 5.5 V

Data Converters

A/D 12x10b

Oscillator Type

Internal

Operating Temperature

-40°C ~ 85°C

Processor Series

PIC18F

Core

PIC

Data Bus Width

8 bit

Data Ram Size

3936 B

Interface Type

SPI/I2C/EUSART

Maximum Clock Frequency

40 MHz

Number Of Programmable I/os

Number Of Timers

Operating Supply Voltage

4.2 V to 5.5 V

Maximum Operating Temperature

+ 85 C

Mounting Style

SMD/SMT

3rd Party Development Tools

52715-96, 52716-328, 52717-734, 52712-325, EWPIC18

Development Tools By Supplier

PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032, DM183022

Minimum Operating Temperature

- 40 C

On-chip Adc

12-ch x 10-bit

Package

64TQFP

Device Core

PIC

Family Name

PIC18

Maximum Speed

40 MHz

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

For Use With

MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II

Lead Free Status / Rohs Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

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Part Number:

PIC18F6722-I/PT

Manufacturer:

Microchip Technology

Quantity:

25 267

Company:

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PIC18F6722-I/PT

Manufacturer:

Microchip Technology

Quantity:

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Part Number:

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Manufacturer:

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Part Number:

PIC18F6722-I/PT

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The PIC18F6627/6722/8627/8722 Rev. B1 parts you

have received conform functionally to the Device Data

Sheet

described below. Any Data Sheet Clarification issues

related to the PIC18F6627/6722/8627/8722 will be

reported in a separate Data Sheet errata. Please check

the Microchip web site for any existing issues.

The

PIC18F6627/6722/8627/8722 devices with these

Device/Revision IDs:

All of the issues listed here will be addressed in future

revisions of the PIC18F6627/6722/8627/8722 silicon.

1. Module: Master Synchronous Serial Port

The Device IDs (DEVID1 and DEVID2) are located at

addresses

configuration space. They are shown in binary in the

format “DEVID2 DEVID1”.

Part Number

PIC18F6627

PIC18F6722

PIC18F8627

PIC18F8722

In SPI mode, the Buffer Full flag (BF bit in the

SSPxSTAT register), the Write Collision Detect bit

(WCOL in SSPxCON1) and the Receive Overflow

Indicator bit (SSPOV in SSPxCON1) are not reset

upon disabling the SPI module (by clearing the

SSPEN bit in the SSPxCON1 register).

For example, if SSPxBUF is full (BF bit is set), and

the MSSP module is disabled and re-enabled, the

BF bit will remain set. In SPI Slave mode, a sub-

sequent write to SSPxBUF will result in a write

collision. Also, if a new byte is received, a receive

overflow will occur.

Work around

Ensure that if the buffer is full, SSPxBUF is read

(thus clearing the BF flag) and WCOL is clear

before disabling the MSSP module. If the module

is configured in SPI Slave mode, ensure that the

SSPOV bit is clear before disabling the module.

Date Codes that pertain to this issue:

All engineering and production devices.

following

(DS39646C),

PIC18F6627/6722/8627/8722 Rev. B1 Silicon Errata

3FFFFEh:3FFFFFh

(MSSP) — Serial Peripheral

Interface (SPI)

silicon

0001 0100 000

0001 0100 001

0001 0011 110

0001 0011 111

Device ID

except

errata apply

for

the

PIC18F6627/6722/8627/8722

Revision ID

the

0 0010

anomalies

only

device’s

2. Module: Capture/Compare/PWM (CCP)

3. Module: MSSP (I

PWM output of 10-bit resolution is not available for

either CCP4 or CCP5 when Timer4 is being used

as the PWM time base (T3CON<6,3> = 01, 10 or

11) for the PWM mode (CCPxCON<3:2> = 11).

Work around

For 10-bit resolution, use Timer2 as the PWM time

base (T3CON<6,3> = 00).

For 8-bit resolution, use Timer4 or Timer2 as the

PWM time base and set the two LSBs to ‘00’

(CCPxCON<5:4> = 00).

Date Codes that pertain to this issue:

All engineering and production devices.

In extremely rare cases, when configured for I

slave reception, the MSSP module may not receive

the correct data. This occurs only if the Serial

Receive/Transmit Buffer Register (SSPxBUF) is not

read within a window after the SSPxIF interrupt has

occurred.

For SSP1BUF, the flag bit is SSP1IF (PIR1<3>).

For SSP2BUF, the flag bit is SSP2IF (PIR3<7>).

Work around

The issue can be resolved in either of these ways:

• Prior to the I

• Each time the SSPxIF bit is set, read the

Date Codes that pertain to this issue:

All engineering and production devices.

clock-stretching feature.

This

(SSP1CON2<0>).

SSPxBUF before the first rising clock edge of

the next byte being received.

done

C slave reception, enable the

C™ Slave)

setting

DS80343B-page 1

the

SEN

C™

bit

Related parts for PIC18F6722-I/PT

PIC18F6722-I/PT Summary of contents

Page 1

... The following silicon errata apply PIC18F6627/6722/8627/8722 devices with these Device/Revision IDs: Part Number Device ID PIC18F6627 0001 0011 110 PIC18F6722 0001 0100 000 PIC18F8627 0001 0011 111 PIC18F8722 0001 0100 001 The Device IDs (DEVID1 and DEVID2) are located at addresses 3FFFFEh:3FFFFFh in configuration space. They are shown in binary in the format “ ...

Page 2

... Timer 1 with 0xFFFF, the Timer1 interrupt will not get set on the first overflow from 0xFFFF to 0x0000. All subsequent overflows, from 0xFFFF to 0x0000, will work correctly. Work around None. Date Codes that pertain to this issue: All engineering and production devices. © 2009 Microchip Technology Inc. ...

Page 3

... REVISION HISTORY Rev A Document (8/2007) Initial release of this errata. Includes silicon issues 1 (MSSP) and 2 (CCP). Rev B Document (2/2009) 2 Added silicon issues 3 (MSSP – Slave), 4 (MSSP – Master), 5 (Enhanced Universal Synchronous Asynchronous – EUSART) and 6 (Timer1). © 2009 Microchip Technology Inc. PIC18F6627/6722/8627/8722 DS80343B-page 3 ...

Page 4

Page 5

... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 6

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2009 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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