P87C51FB-4N,112 NXP Semiconductors, P87C51FB-4N,112 Datasheet - Page 41

• Manufacturer Part Number: P87C51FB-4N,112
• Description: IC 80C51 MCU 16K OTP 40-DIP
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C51FB-4N,112

• Program Memory Type: OTP
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, PWM
• Number Of I /o: 32
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Processor Series: P87C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Cpu Family: 87C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 256Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 40
• Package Type: PDIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM10064 - EMULATOR 80C51 PDS51-MK2
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-1010-5; 935258810112; P87C51FB-4N

Philips Semiconductors
2000 Aug 07
WRITE TO SBUF
INSTRUCTION
PORT 0
PORT 2
INPUT DATA
OUTPUT DATA
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33MHz)
CLEAR RI
PSEN
ALE
WR
CLOCK
ALE
t
AVLL
0
t
QVXH
FROM RI OR DPL
A0–A7
t
t
1
XHDV
LLAX
t
AVWL
0
t
t
XLXL
VALID
LLWL
V
CC
0.45V
–0.5
P2.0–P2.7 OR A8–A15 FROM DPF
Figure 31. External Data Memory Write Cycle
t
XHQX
2
Figure 32. Shift Register Mode Timing
1
VALID
t
QVWX
Figure 33. External Clock Drive
0.2V
t
CHCL
0.7V
t
CC
t
XHDX
DATA OUT
QVWH
CC
3
t
WLWH
–0.1
2
VALID
41
t
CLCX
4
t
CLCL
VALID
3
t
CHCX
t
CLCH
t
WHLH
t
5
WHQX
8XC51RA+/RB+/RC+/RD+/80C51RA+
SU00009
VALID
4
A0–A7 FROM PCL
A0–A15 FROM PCH
6
8XC51FA/FB/FC/80C51FA
VALID
5
7
VALID
6
Product specification
8XC54/58
INSTR IN
8
SU00026
SET TI
VALID
SET RI
SU00027
7