STM32F103VCT6TR STMicroelectronics, STM32F103VCT6TR Datasheet - Page 72

• Manufacturer Part Number: STM32F103VCT6TR
• Description: MCU 32BIT ARM 256K FLASH 100-LQF
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F103VCT6TR

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 80
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: STM32F103x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 48 KB
• Interface Type: CAN, I2C, SPI, USART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 11
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: 497-10030 - STARTER KIT FOR STM32497-8511 - KIT STARTER FOR STM32 512K FLASH497-6438 - BOARD EVALUTION FOR STM32 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Electrical characteristics
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PC Card/CompactFlash controller waveforms and timings
Figure 32
corresponding timings. The results shown in this table are obtained with the following FSMC
configuration:
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Figure 32. PC Card/CompactFlash controller waveforms for common memory read
1. FSMC_NCE4_2 remains high (inactive during 8-bit access.
FSMC_NCE4_2
COM.FSMC_SetupTime = 0x04;
COM.FSMC_WaitSetupTime = 0x07;
COM.FSMC_HoldSetupTime = 0x04;
COM.FSMC_HiZSetupTime = 0x00;
ATT.FSMC_SetupTime = 0x04;
ATT.FSMC_WaitSetupTime = 0x07;
ATT.FSMC_HoldSetupTime = 0x04;
ATT.FSMC_HiZSetupTime = 0x00;
IO.FSMC_SetupTime = 0x04;
IO.FSMC_WaitSetupTime = 0x07;
IO.FSMC_HoldSetupTime = 0x04;
IO.FSMC_HiZSetupTime = 0x00;
TCLRSetupTime = 0;
TARSetupTime = 0;
FSMC_NCE4_1
FSMC_NIOWR
FSMC_NIORD
FSMC_D[15:0]
FSMC_A[10:0]
FSMC_NREG
FSMC_NWE
FSMC_NOE
through
access
t d(NCE4_1-NOE)
(1)
Figure 37
represent synchronous waveforms and
Doc ID 14611 Rev 7
t d(NREG-NCEx)
t d(NIORD-NCEx)
t v(NCEx-A)
t w(NOE)
STM32F103xC, STM32F103xD, STM32F103xE
t su(D-NOE)
t h(NCEx-NREG)
t h(NCEx-NIORD)
t h(NCEx-NIOWR)
t h(NCEx-AI)
t h(NOE-D)
Table 39
provides the
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