C8051F220-GQR Silicon Laboratories Inc, C8051F220-GQR Datasheet - Page 120

IC 8051 MCU 8K FLASH 48TQFP

C8051F220-GQR

Manufacturer Part Number
C8051F220-GQR
Description
IC 8051 MCU 8K FLASH 48TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F2xxr
Datasheets

Specifications of C8051F220-GQR

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 32x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
C8051F2x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
3 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F226DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 32 Channel
For Use With
336-1241 - DEV KIT F220/221/226/230/231/236
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F220-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F2xx
If T1M (CKCON.4) is logic 1, then the above equation becomes:
If T1M (CKCON.4) is logic 0, then the above equation becomes:
The Timer 2 overflow rate, when in Baud Rate Generator Mode and using an internal clock source, is
determined solely by the Timer 2 16-bit reload value (RCAP2H:RCAP2L). The Timer 2 clock source is
fixed at SYSCLK/2. The Timer 2 overflow rate can be calculated as follows:
Timer 2 can be selected as the baud rate generator for RX and/or TX by setting RCLK (T2CON.5) and/or
TCLK (T2CON.4), respectively. When either RCLK or TCLK is set to logic 1, Timer 2 interrupts are auto-
matically disabled and the timer is forced into Baud Rate Generator Mode with SYSCLK/2 as its clock
source. If a different timebase is required, setting the C/T2 bit (T2CON.1) to logic 1 will allow Timer 2 to be
clocked from the external input pin T2. See the Timers section for complete timer configuration details.
120
Figure 16.5. UART Modes 1, 2, and 3 Interconnect Diagram
T2_OVERFLOWRATE = (SYSCLK/2) / (65536 – [RCAP2H:RCAP2L]).
RS-232
T1_OVERFLOWRATE = (SYSCLK/12) / (256 – TH1).
T1_OVERFLOWRATE = (SYSCLK) / (256 – TH1).
MCU
TX
RX
RS-232
LEVEL
Rev. 1.6
XLTR
OR
RX
RX
TX
TX
C8051Fxxx
C8051Fxxx

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