M30281FCHP#U3B Renesas Electronics America, M30281FCHP#U3B Datasheet - Page 177

IC M16C/28 MCU FLASH 64-LQFP

M30281FCHP#U3B

Manufacturer Part Number
M30281FCHP#U3B
Description
IC M16C/28 MCU FLASH 64-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/28r
Datasheet

Specifications of M30281FCHP#U3B

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, POR, PWM, Voltage Detect, WDT
Number Of I /o
55
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M
R
R
1
e
E
Figure 13.21 Prescaler Function and Gate Function
. v
6
J
C
0
2
9
2 /
0 .
B
8
0
0
0
(b) With the gate function
(a) With the prescaler function
G
4
J
7
a
o r
0 -
. n
(The gate function is cleared by matching the base timer with the G1POk register(k=4,5),
(When the G1TPRj register (j = 6,7) is set to "02
u
the GT bit in the G1TMCRj (j = 6, 7) register is set to "1", the GOC bit is set to "1")
2
p
3
0
, 1
NOTES:
0
Base timer
f
INPC1j pin input or
trigger signal after
passing the digital
filter
Internal time
measurement trigger
Prescaler
G1IRj bit
G1TMj register
(
BT1
Internal time
measurement trigger
G1TMj register
f
Base timer
IFEj bit in G1FE
register
INPC1j pin input or
trigger signal after
passing the digital
filter
G1POk register
match signal
Gate control signal
G1IRj bit
M
BT1
2
1. This applies to 2nd or later prescaler cycle after the PR bit in the G1TMCRj register is set to "1" (prescaler used).
2. Bits in the G1IR register.
1
NOTE:
0
0
6
1. Bits in the G1IR register.
7
C
(2)
2 /
(1)
(1)
page 155
, 8
M
1
6
C
0000
FFFF
2 /
f o
n-2
8
16
16
3
) B
8
5
n-1
n
n+1
Value of the G1POk register
n+2
16
Gate
Set 0 by program if necessary
Set 0 by program if necessary
2
", the PR bit in the G1TMCRj (j = 6,7) register is set to "1")
n+3
This trigger input is disabled
due to gate function.
n+4
n+5
n+6
1
Gate cleared
n+1
n+7
n+8
n+9 n+10 n+11
0
Gate
+12 n+13
n+14
2
n+13
13. Timer S

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