SAK-XC164CM-16F40F BA Infineon Technologies, SAK-XC164CM-16F40F BA Datasheet - Page 63

• Manufacturer Part Number: SAK-XC164CM-16F40F BA
• Description: IC MCU 16BIT FLASH 64-LQFP
• Manufacturer: Infineon Technologies
• Series: XC16xr

Specifications of SAK-XC164CM-16F40F BA

• Core Processor: C166SV2
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SPI, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 47
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.7 V
• Data Converters: A/D 14x8/10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LFQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: 2xASC, 2xSSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 9
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 14 Channel
• Packages: PG-LQFP-64
• Max Clock Frequency: 40.0 MHz
• Sram (incl. Cache): 8.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 14
• Program Memory: 128.0 KByte
• For Use With: B158-H8961-X-X-7600IN - KIT EASY XC164CMXC164CMUCANIN - KIT U-CAN STARTER XC164CM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000258408

This is especially important for bus cycles using waitstates and e.g. for the operation of
timers, serial interfaces, etc. For all slower operations and longer periods (e.g. pulse train
generation or measurement, lower baudrates, etc.) the deviation caused by the PLL jitter
is negligible.
The value of the accumulated PLL jitter depends on the number of consecutive VCO
output cycles within the respective timeframe. The VCO output clock is divided by the
output prescaler (K = PLLODIV+1) to generate the master clock signal
the number of VCO cycles can be represented as K × N, where N is the number of
consecutive
For a period of N × TCM the accumulated PLL jitter is defined by the deviation D
D
So, for a period of 3 TCMs @ 20 MHz and K = 12: D
This formula is applicable for K × N < 95. For longer periods the K × N = 95 value can be
used. This steady value can be approximated by: D
Figure 16
Note: The bold lines indicate the minimum accumulated jitter which can be achieved by
Data Sheet
N
[ns] = ±(1.5 + 6.32 × N /
selecting the maximum possible output prescaler factor K.
Acc. jitter
±8
±7
±6
±5
±4
±3
±2
±1
ns
f
0
MC
Approximated Accumulated PLL Jitter
0
cycles (TCM).
1
10 MHz
40 MHz
D
N
K = 15
5
20 MHz
f
MC
K = 12
);
f
MC
K = 10
10
in [MHz], N = number of consecutive TCMs.
K = 8
61
K = 6 K = 5
15
3
Nmax
= ±(1.5 + 6.32 × 3 / 20) = 2.448 ns.
[ns] = ±(1.5 + 600 / (K ×
20
Electrical Parameters
25
MCD05566
f
MC
Derivatives
V1.4, 2007-03
. Therefore,
XC164CM
N
N
f
MC
:
)).