SAB-C165-L25M HA Infineon Technologies, SAB-C165-L25M HA Datasheet - Page 51

• Manufacturer Part Number: SAB-C165-L25M HA
• Description: IC MCU 16BIT MQFP-100-2
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAB-C165-L25M HA

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-SQFP
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: 1xASC, 1xSSC
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 77
• Number Of Timers: 5
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Packages: PG-MQFP-100
• Max Clock Frequency: 25.0 MHz
• Sram (incl. Cache): 2.0 KByte
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: B165L25MHAXP; SABC165L25MHAXT; SP000011593; SP000011594

Multiplexed Bus (Standard Supply Voltage Range) (cont’d)
(Operating Conditions apply)
ALE cycle time = 6 TCL + 2
Parameter
Address float after RdCS,
WrCS (with RW delay)
Address float after RdCS,
WrCS (no RW delay)
RdCS to Valid Data In
(with RW delay)
RdCS to Valid Data In
(no RW delay)
RdCS, WrCS Low Time
(with RW delay)
RdCS, WrCS Low Time
(no RW delay)
Data valid to WrCS
Data hold after RdCS
Data float after RdCS
Address hold after
RdCS, WrCS
Data hold after WrCS
1)
Data Sheet
These parameters refer to the latched chip select signals (CSxL). The early chip select signals (CSxE) are
specified together with the address and signal BHE (see figures below).
t
Symbol
t
t
t
t
t
t
t
t
t
t
t
A
44
45
46
47
48
49
50
51
52
54
56
+
t
CC –
CC –
CC 30 +
CC 50 +
CC 26 +
CC 20 +
CC 20 +
SR –
SR –
SR 0
SR –
C
+
t
F
min.
Max. CPU Clock
(120 ns at 25 MHz CPU clock without waitstates)
= 25 MHz
t
t
t
t
t
47
C
C
C
F
F
max.
0
20
16 +
36 +
–
–
–
–
20 +
–
–
t
t
t
C
C
F
1 / 2TCL = 1 to 25 MHz
min.
–
–
–
–
2TCL - 10
+
3TCL - 10
+
2TCL - 14
+
0
–
2TCL - 20
+
2TCL - 20
+
Variable CPU Clock
t
t
t
t
t
C
C
C
F
F
max.
2TCL - 24
3TCL - 24
2TCL - 20
0
TCL
+
+
–
–
–
–
+
–
–
t
t
t
C
C
F
V2.0, 2000-12
C165
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns