PIC16C84-04/P Microchip Technology, PIC16C84-04/P Datasheet - Page 27

• Manufacturer Part Number: PIC16C84-04/P
• Description: MICRO CTRL 1KX14 EPR EEPR 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C84-04/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: EEPROM
• Eeprom Size: 64 x 8
• Ram Size: 36 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Data Converters: -
• Connectivity: -

6.2
When an external clock input is used for TMR0, it must
meet certain requirements. The external clock
requirement is due to internal phase clock (T
synchronization. Also, there is a delay in the actual
incrementing
synchronization.
6.2.1
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of pin RA4/T0CKI with the internal phase clocks is
accomplished by sampling the prescaler output on the
Q2 and Q4 cycles of the internal phase clocks
(Figure 6-5). Therefore, it is necessary for T0CKI to be
high for at least 2Tosc (plus a small RC delay) and low
for at least 2Tosc (plus a small RC delay). Refer to the
electrical specification of the desired device.
When a prescaler is used, the external clock input is
divided by an asynchronous ripple counter type
prescaler so that the prescaler output is symmetrical.
For the external clock to meet the sampling
requirement, the ripple counter must be taken into
account. Therefore, it is necessary for T0CKI to have a
period of at least 4Tosc (plus a small RC delay) divided
by the prescaler value. The only requirement on T0CKI
high and low time is that they do not violate the
minimum pulse width requirement of 10 ns. Refer to
parameters 40, 41 and 42 in the AC Electrical
Specifications of the desired device.
FIGURE 6-5:
1997 Microchip Technology Inc.
Note 1:
Using TMR0 with External Clock
EXTERNAL CLOCK SYNCHRONIZATION
2:
3:
Delay from clock input change to TMR0 increment is 3Tosc to 7Tosc. (Duration of Q = Tosc).
Therefore, the error in measuring the interval between two edges on TMR0 input =
External clock if no prescaler selected, Prescaler output otherwise.
The arrows
Prescaler Out (Note 2)
Output After Sampling
Increment TMR0 (Q4)
of
Ext. Clock/Prescaler
TIMER0 TIMING WITH EXTERNAL CLOCK
Ext. Clock Input or
the
indicate where sampling occurs. A small clock pulse may be missed by sampling.
TMR0
TMR0
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
register
OSC
after
)
T0
6.3
An 8-bit counter is available as a prescaler for the
Timer0 Module, or as a postscaler for the Watchdog
Timer (Figure 6-6). For simplicity, this counter is being
referred to as “prescaler” throughout this data sheet.
Note that there is only one prescaler available which is
mutually exclusive between the Timer0 Module and the
Watchdog Timer. Thus, a prescaler assignment for the
Timer0 Module means that there is no prescaler for the
Watchdog Timer, and vice-versa.
The PSA and PS2:PS0 bits (OPTION<3:0>) determine
the prescaler assignment and prescale ratio.
When assigned to the Timer0 Module, all instructions
writing to the Timer0 Module (e.g., CLRF 1, MOVWF 1,
BSF
assigned to WDT, a CLRWDT instruction will clear the
prescaler along with the Watchdog Timer. The
prescaler is not readable or writable.
6.2.2
Since the prescaler output is synchronized with the
internal clocks, there is a small delay from the time the
external clock edge occurs to the time the Timer0
Module is actually incremented. Figure 6-5 shows the
delay from the external clock edge to the timer
incrementing.
1,x ....etc.) will clear the prescaler. When
TMR0 INCREMENT DELAY
Prescaler
T0 + 1
4Tosc max.
PIC16C84
(Note 3)
T0 + 2
DS30445C-page 27