PIC16C84-04I/P Microchip Technology, PIC16C84-04I/P Datasheet - Page 49

• Manufacturer Part Number: PIC16C84-04I/P
• Description: IC MIC CTL EEPM 1K 4MHZ IT 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C84-04I/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 13
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: EEPROM
• Eeprom Size: 64 x 8
• Ram Size: 36 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Data Converters: -
• Connectivity: -

8.12.3
When global interrupts are disabled (GIE cleared) and
any interrupt source has both its interrupt enable bit
• If the interrupt occurs during or after the execu-
Even if the flag bits were checked before executing a
SLEEP instruction, it may be possible for flag bits to
become set before the SLEEP instruction completes.
To determine whether a SLEEP instruction executed,
test the PD bit. If the PD bit is set, the SLEEP instruc-
tion was executed as a NOP.
To ensure that the WDT is cleared, a CLRWDT instruc-
tion should be executed before a SLEEP instruction.
8.13
If
programmed, the on-chip program memory can be
read out for verification purposes.
8.14
Four memory locations (2000h - 2003h) are designated
as ID locations to store checksum or other code
identification numbers. These locations are not
accessible during normal execution but are readable
and writable only during program/verify. Only the
4 least significant bits of ID location are usable.
For ROM devices, these values are submitted along
with the ROM code.
and interrupt flag bit set, one of the following will occur:
• If the interrupt occurs before the execution of a
1997 Microchip Technology Inc.
SLEEP instruction, the SLEEP instruction will
complete as a NOP. Therefore, the WDT and WDT
postscaler will not be cleared, the TO bit will not
be set and PD bits will not be cleared.
tion of a SLEEP instruction, the device will imme-
diately wake up from sleep . The SLEEP
instruction will be completely executed before the
wake-up. Therefore, the WDT and WDT
postscaler will be cleared, the TO bit will be set
and the PD bit will be cleared.
Note:
the
WAKE-UP USING INTERRUPTS
Program Verification/Code Protection
ID Locations
code
Microchip does not recommend code pro-
tecting windowed devices..
protection
bit(s)
have
not
been
8.15
PIC16C84
programmed while in the end application circuit. This is
simply done with two lines for clock and data, and three
other lines for power, ground, and the programming
voltage. Customers can manufacture boards with
unprogrammed devices, and then program the
microcontroller just before shipping the product,
allowing the most recent firmware or custom firmware
to be programmed.
The device is placed into a program/verify mode by
holding the RB6 and RB7 pins low, while raising the
MCLR pin from V
Memory Programming Specification (DS30189)). RB6
becomes the programming clock and RB7 becomes
the programming data. Both RB6 and RB7 are Schmitt
Trigger inputs in this mode.
After reset, to place the device into programming/verify
mode, the program counter (PC) points to location 00h.
A 6-bit command is then supplied to the device, 14-bits
of program data is then supplied to or from the device,
using load or read-type instructions. For complete
details of serial programming, please refer to the In-Cir-
cuit Serial Programming Guide (DS30277).
For ROM devices, both the program memory and Data
EEPROM memory may be read, but only the Data
EEPROM memory may be programmed.
FIGURE 8-19: TYPICAL IN-SYSTEM SERIAL
External
Connector
Signals
Data I/O
CLK
+5V
V
0V
In-Circuit Serial Programming
PP
microcontrollers
IL
PROGRAMMING
CONNECTION
to V
To Normal
Connections
To Normal
Connections
IHH
(see PIC16C84 EEPROM
PIC16C84
can
DS30445C-page 49
V
V
MCLR/V
RB6
RB7
DD
SS
PIC16CXX
be
V
PP
DD
serially