PIC16C54B-20/SO Microchip Technology, PIC16C54B-20/SO Datasheet - Page 22

MICRO CTRL 512 20MHZ OTP 18SOIC

PIC16C54B-20/SO

Manufacturer Part Number
PIC16C54B-20/SO
Description
MICRO CTRL 512 20MHZ OTP 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets

Specifications of PIC16C54B-20/SO

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
12
Program Memory Size
768B (512 x 12)
Program Memory Type
OTP
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Data Converters
-
Connectivity
-
PIC16C5X
4.5
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next
program instruction to be executed. The PC value is
increased by one every instruction cycle, unless an
instruction changes the PC.
For a GOTO instruction, bits 8:0 of the PC are provided
by the GOTO instruction word. The PC Latch (PCL) is
mapped to PC<7:0> (Figure 4-10 and Figure 4-11).
For the PIC16C56s, PIC16CR56s, PIC16C57s,
PIC16CR57s, PIC16C58s and PIC16CR58s, a page
number must be supplied as well. Bit5 and bit6 of the
STATUS register provide page information to bit9 and
bit10 of the PC (Figure 4-11 and Figure 4-12).
For a CALL instruction, or any instruction where the
PCL is the destination, bits 7:0 of the PC again are
provided by the instruction word. However, PC<8>
does not come from the instruction word, but is always
cleared (Figure 4-10 and Figure 4-11).
Instructions where the PCL is the destination, or
Modify PCL instructions, include MOVWF PC, ADDWF
PC, and BSF PC,5.
For the PIC16C56s, PIC16CR56s, PIC16C57s,
PIC16CR57s, PIC16C58s and PIC16CR58s, a page
number again must be supplied. Bit5 and bit6 of the
STATUS register provide page information to bit9 and
bit10 of the PC (Figure 4-11 and Figure 4-12).
DS30453B-page 22
Note:
Program Counter
Because PC<8> is cleared in the CALL
instruction, or any Modify PCL instruction,
all subroutine calls or computed jumps are
limited to the first 256 locations of any pro-
gram memory page (512 words long).
Preliminary
FIGURE 4-10: LOADING OF PC
FIGURE 4-11: LOADING OF PC
GOTO Instruction
CALL or Modify PCL Instruction
CALL or Modify PCL Instruction
GOTO Instruction
Reset to '0'
PC
PC
PC
PC
7
7
10
2
10
2
8
8
9
STATUS
9
PA1:PA0
STATUS
PA1:PA0
BRANCH INSTRUCTIONS -
PIC16C52, PIC16C54s,
PIC16CR54s, PIC16C55s
BRANCH INSTRUCTIONS -
PIC16C56s/PIC16CR56s
7
7
Instruction Word
Reset to ‘0’
8 7
8 7
Instruction Word
Instruction Word
PCL
PCL
Instruction Word
1998 Microchip Technology Inc.
PCL
0
PCL
0
0
0
0
0

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