AT89S53-24PC Atmel, AT89S53-24PC Datasheet - Page 16

• Manufacturer Part Number: AT89S53-24PC
• Description: IC MICRO CTRL 24MHZ 40DIP
• Manufacturer: Atmel
• Series: 89Sr

Specifications of AT89S53-24PC

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: SPI, UART/USART
• Peripherals: WDT
• Number Of I /o: 32
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: No

Figure 9. SPI Transfer Format with CPHA = 1
*Not defined but normally LSB of previously transmitted character
Interrupts
The AT89S53 has a total of six interrupt vectors: two exter-
nal interrupts (INT0 and INT1), three timer interrupts
(Timers 0, 1, and 2), and the serial port interrupt. These
interrupts are all shown in Figure 10.
Each of these interrupt sources can be individually enabled
or disabled by setting or clearing a bit in Special Function
Register IE. IE also contains a global disable bit, EA, which
disables all interrupts at once.
Note that Table 10 shows that bit position IE.6 is unimple-
men ted. In the AT89C51 , bit p osition IE.5 is also
unimplemented. User software should not write 1s to these
bit positions, since they may be used in future AT89
products.
Table 10. Interrupt Enable (IE) Register
16
(MSB)(LSB)
Symbol
ET2
ET1
EX1
EA
ES
–
EA
Enable Bit = 1 enables the interrupt.
Enable Bit = 0 disables the interrupt.
(FOR REFERENCE)
AT89S53
(FROM MASTER)
–
Position
SS (TO SLAVE)
(FROM SLAVE)
SCK (CPOL=0)
SCK (CPOL=1)
SCK CYCLE #
IE.7
IE.6
IE.5
IE.4
IE.3
IE.2
ET2
Function
Disables all interrupts. If EA = 0, no interrupt
is acknowledged. If EA = 1, each interrupt
source is individually enabled or disabled by
setting or clearing its enable bit.
Reserved.
Timer 2 interrupt enable bit.
SPI and UART interrupt enable bit.
Timer 1 interrupt enable bit.
External interrupt 1 enable bit.
MOSI
MISO
ES
ET1
*
EX1
MSB
MSB
1
ET0
2
EX0
6
6
3
5
5
Figure 10. Interrupt Sources
User software should never write 1s to unimplemented bits, because
they may be used in future AT89 products.
4
4
4
ET0
EX0
5
3
3
IE.1
IE.0
6
2
2
Timer 0 interrupt enable bit.
External interrupt 0 enable bit.
7
1
1
8
LSB
LSB
0787E–MICRO–3/06