ATMEGA8L-8PC Atmel, ATMEGA8L-8PC Datasheet - Page 35

• Manufacturer Part Number: ATMEGA8L-8PC
• Description: IC AVR MCU 8K LV 8MHZ COM 28-DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8L-8PC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA8L8PC

Standby Mode
Table 14. Active Clock Domains and Wake-up Sources in the Different Sleep Modes
Notes:
Minimizing Power
Consumption
Analog-to-Digital
Converter (ADC)
Analog Comparator
2486Z–AVR–02/11
Sleep
Mode
Idle
ADC Noise
Reduction
Power
Down
Power
Save
Standby
1. External Crystal or resonator selected as clock source
2. If AS
3. Only level interrupt INT1 and INT0
(1)
clk
CPU
2
bit in ASSR is set
Active Clock Domains
clk
FLASH
When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected, the
SLEEP instruction makes the MCU enter Standby mode. This mode is identical to Power-down
with the exception that the Oscillator is kept running. From Standby mode, the device wakes up
in 6 clock cycles.
There are several issues to consider when trying to minimize the power consumption in an AVR
controlled system. In general, sleep modes should be used as much as possible, and the sleep
mode should be selected so that as few as possible of the device’s functions are operating. All
functions not needed should be disabled. In particular, the following modules may need special
consideration when trying to achieve the lowest possible power consumption.
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be dis-
abled before entering any sleep mode. When the ADC is turned off and on again, the next
conversion will be an extended conversion. Refer to
for details on ADC operation.
When entering Idle mode, the Analog Comparator should be disabled if not used. When entering
ADC Noise Reduction mode, the Analog Comparator should be disabled. In the other sleep
modes, the Analog Comparator is automatically disabled. However, if the Analog Comparator is
set up to use the Internal Voltage Reference as input, the Analog Comparator should be dis-
abled in all sleep modes. Otherwise, the Internal Voltage Reference will be enabled,
independent of sleep mode. Refer to
configure the Analog Comparator.
clk
X
IO
clk
X
X
ADC
clk
X
X
X
(2)
ASY
Source Enabled
Main Clock
X
X
X
Oscillators
“Analog Comparator” on page 186
Timer Osc.
Enabled
X
X
X
(2)
(2)
(2)
INT1
INT0
X
X
X
X
“Analog-to-Digital Converter” on page 189
X
(3)
(3)
(3)
(3)
Address
Match
TWI
X
X
X
X
X
Wake-up Sources
Timer
X
X
X
2
(2)
ATmega8(L)
EEPROM
for details on how to
Ready
SPM/
X
X
ADC
X
X
Other
I/O
X
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