AT91SAM9261SB-CU Atmel, AT91SAM9261SB-CU Datasheet - Page 18

• Manufacturer Part Number: AT91SAM9261SB-CU
• Description: IC ARM9 MPU 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261SB-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, I2S, SPI, USB
• Maximum Clock Frequency: 190 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9261-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

8.1.2.1
8.1.2.2
8.2
18
External Memories
AT91SAM9261S
BMS = 1, Boot on Embedded ROM
BMS = 0, Boot on External Memory
The system boots using the Boot Program.
The customer-programmed software must perform a complete configuration.
To speed up the boot sequence when booting at 32 kHz EBI CS0 (BMS=0), the user must take
the following steps:
The external memories are accessed through the External Bus Interface (Bus Matrix Slave 3).
Refer to the memory map in
• Enable the 32,768 Hz oscillator
• Auto baudrate detection
• Downloads and runs an application from external storage media into internal SRAM
• Automatic detection of valid application
• Bootloader on a non volatile memory
• SAM-BA Boot in case no valid program is detected in external NVM, supporting:
• Boot on slow clock (32,768 Hz)
• Boot with the default configuration for the Static Memory Controller, byte select mode, 16-bit
1. Program the PMC (main oscillator enable or bypass mode).
2. Program and start the PLL.
3. Reprogram the SMC setup, cycle, hold, mode timings registers for CS0 to adapt them
4. Switch the main clock to the new value.
data bus, Read/Write controlled by Chip Select, allows boot on 16-bit non-volatile memory.
– SPI Serial Flash or DataFlash connected to NPCS0 of the SPI0
– NAND Flash
– SDCARD (boot ROM does not support high capacity SDCards)
– Serial communication on a DBGU
– USB Device HS Port
to the new clock
Figure 8-1 on page
15.
6242ES–ATARM–11-Sep-09