LP38690DT-3.3/NOPB National Semiconductor, LP38690DT-3.3/NOPB Datasheet - Page 14

IC REG LDO 1A 3.3V TO-252

LP38690DT-3.3/NOPB

Manufacturer Part Number
LP38690DT-3.3/NOPB
Description
IC REG LDO 1A 3.3V TO-252
Manufacturer
National Semiconductor
Series
PowerWise®r

Specifications of LP38690DT-3.3/NOPB

Regulator Topology
Positive Fixed
Voltage - Output
3.3V
Voltage - Input
Up to 10V
Voltage - Dropout (typical)
0.65V @ 1A
Number Of Regulators
1
Current - Output
1A
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
TO-252-2, DPak (2 Leads + Tab), TO-252AA, SC-63
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Limit (min)
-
Other names
*LP38690DT-3.3
*LP38690DT-3.3/NOPB
LP38690DT-3.3

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LP38690DT-3.3/NOPB
Manufacturer:
TI/德州仪器
Quantity:
20 000
Application Hints
EXTERNAL CAPACITORS
Like any low-dropout regulator, external capacitors are re-
quired to assure stability. These capacitors must be correctly
selected for proper performance.
INPUT CAPACITOR: An input capacitor of at least 1µF is re-
quired (ceramic recommended). The capacitor must be lo-
cated not more than one centimeter from the input pin and
returned to a clean analog ground.
OUTPUT CAPACITOR: An output capacitor is required for
loop stability. It must be located less than 1 centimeter from
the device and connected directly to the output and ground
pins using traces which have no other currents flowing
through them.
The minimum amount of output capacitance that can be used
for stable operation is 1µF. Ceramic capacitors are recom-
mended (the LP38690/2 was designed for use with ultra low
ESR capacitors). The LP38690/2 is stable with any output
capacitor ESR between zero and 100 Ohms.
ENABLE PIN (LP38692 only): The LP38692 has an Enable
pin (EN) which allows an external control signal to turn the
regulator output On and Off. The Enable On/Off threshold has
no hysteresis. The voltage signal must rise and fall cleanly,
and promptly, through the ON and OFF voltage thresholds.
The Enable pin has no internal pull-up or pull-down to estab-
lish a default condition and, as a result, this pin must be
terminated either actively or passively. If the Enable pin is
driven from a source that actively pulls high and low, the drive
voltage should not be allowed to go below ground potential or
higher than V
function, the pin should be connected directly to the V
Foldback Current Limiting: Foldback current limiting is built
into the LP38690/2 which reduces the amount of output cur-
rent the part can deliver as the output voltage is reduced. The
amount of load current is dependent on the differential voltage
between V
age exceeds 5V, the load current will limit at about 450 mA.
When the V
current is limited to about 1500 mA.
SELECTING A CAPACITOR
It is important to note that capacitance tolerance and variation
with temperature must be taken into consideration when se-
lecting a capacitor so that the minimum required amount of
capacitance is provided over the full operating temperature
range.
Capacitor Characteristics
CERAMIC
For values of capacitance in the 10 to 100 µF range, ceramics
are usually larger and more costly than tantalums but give
superior AC performance for bypassing high frequency noise
because of very low ESR (typically less than 10 mΩ). How-
ever, some dielectric types do not have good capacitance
characteristics as a function of voltage and temperature.
Z5U and Y5V dielectric ceramics have capacitance that drops
severely with applied voltage. A typical Z5U or Y5V capacitor
can lose 60% of its rated capacitance with half of the rated
voltage applied to it. The Z5U and Y5V also exhibit a severe
temperature effect, losing more than 50% of nominal capac-
itance at high and low limits of the temperature range.
X7R and X5R dielectric ceramic capacitors are strongly rec-
ommended if ceramics are used, as they typically maintain a
capacitance range within ±20% of nominal over full operating
IN
IN
and V
IN
- V
. If the application does not require the Enable
OUT
OUT
differential is reduced below 4V, load
. Typically, when this differential volt-
IN
pin.
13
ratings of temperature and voltage. Of course, they are typi-
cally larger and more costly than Z5U/Y5U types for a given
voltage and capacitance.
TANTALUM
Solid Tantalum capacitors have good temperature stability: a
high quality Tantalum will typically show a capacitance value
that varies less than 10-15% across the full temperature
range of -40°C to +125°C. ESR will vary only about 2X going
from the high to low temperature limits.
REVERSE VOLTAGE
A reverse voltage condition will exist when the voltage at the
output pin is higher than the voltage at the input pin. Typically
this will happen when V
tinues to hold a sufficient charge such that the input to output
voltage becomes reversed. A less common condition is when
an alternate voltage source is connected to the output.
There are two possible paths for current to flow from the out-
put pin back to the input during a reverse voltage condition.
1) While V
and the Enable pin (LP38692 only) is above the V
threshold, the control circuitry will attempt to regulate the out-
put voltage. If the input voltage is less than the programmed
output voltage, the control circuit will drive the gate of the pass
element to the full ON condition. In this condition, reverse
current will flow from the output pin to the input pin, limited
only by the R
voltage differential. Discharging an output capacitor up to
1000 μF in this manner will not damage the device as the
current will rapidly decay. However, continuous reverse cur-
rent should be avoided. When the Enable pin is low this
condition will be prevented.
2) The internal PFET pass element has an inherent parasitic
diode. During normal operation, the input voltage is higher
than the output voltage and the parasitic diode is reverse bi-
ased. However, when V
circuity is alive, or the Enable pin is low (LP38692 only), and
the output voltage is more than 500 mV (typical) above the
input voltage the parasitic diode becomes forward biased and
current flows from the output pin to the input pin through the
diode. The current in the parasitic diode should be limited to
less than 1A continuous and 5A peak.
If used in a dual-supply system where the regulator output
load is returned to a negative supply, the output pin must be
diode clamped to ground to limit the negative voltage transi-
tion. A Schottky diode is recommended for this protective
clamp.
PCB LAYOUT
Good PC layout practices must be used or instability can be
induced because of ground loops and voltage drops. The in-
put and output capacitors must be directly connected to the
input, output, and ground pins of the regulator using traces
which do not have other currents flowing in them (Kelvin con-
nect).
The best way to do this is to lay out C
device with short traces to the V
regulator ground pin should be connected to the external cir-
cuit ground so that the regulator and its capacitors have a
"single point ground".
It should be noted that stability problems have been seen in
applications where "vias" to an internal ground plane were
used at the ground points of the IC and the input and output
capacitors. This was caused by varying ground potentials at
these nodes resulting from current flowing through the ground
IN
is high enough to keep the control circuity alive,
DS(ON)
of the pass element and the output to input
IN
IN
is abruptly taken low and C
is below the value where the control
IN
, V
OUT
, and ground pins. The
IN
and C
OUT
www.national.com
OUT
near the
EN(ON)
con-

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