SX1210I084T Semtech, SX1210I084T Datasheet
SX1210I084T
Specifications of SX1210I084T
Related parts for SX1210I084T
SX1210I084T Summary of contents
Page 1
... EN 300-220 V2.1.1) and North American (FCC part 15.247 and 15.249) regulatory standards. Ordering Information Table 1: Ordering Information Part number Delivery SX1210I084TRT Tape & Reel TQFN-32 package – Operating range [-40;+85°C] T refers to Lead Free packaging This device is WEEE and RoHS compliant Application Circuit Schematic th Rev 2– ...
Page 2
... Sensitivity vs. Receiver BW ................................................67 7.6.4. Sensitivity Stability over Temperature and Voltage ............68 7.6.5. Sensitivity vs. Bit Rate ........................................................68 7.6.6. Adjacent Channel Rejection................................................69 8. Packaging Information ..............................................................71 8.1. Package Outline Drawing ......................................................71 8.2. PCB Land Pattern ..................................................................71 8.3. Tape & Reel Specification......................................................72 9. Revision History ........................................................................73 10. Contact Information.................................................................73 Page SX1210 www.semtech.com ...
Page 3
... Figure 53: FSK Sensitivity vs. Rx BW...........................................67 Figure 54: OOK Sensitivity Change vs ............................67 Figure 55: Sensitivity Stability .......................................................68 Figure 56: FSK Sensitivity vs. BR .................................................68 Figure 57: OOK Sensitivity vs. BR ................................................69 Figure 58: ACR in FSK Mode .......................................................69 Figure 59: ACR in OOK Mode ......................................................70 Figure 60: Package Outline Drawing ............................................71 Figure 61: PCB Land Pattern........................................................71 Figure 62: Tape & Reel Dimensions .............................................72 Page SX1210 www.semtech.com ...
Page 4
... Phase-Locked Loop POR Power On Reset RBW Resolution BandWidth RF Radio Frequency RSSI Received Signal Strength Indicator Rx Receiver SAW Surface Acoustic Wave SPI Serial Peripheral Interface SR Shift Register Stby Standby Tx Transmitter uC Microcontroller VCO Voltage Controlled Oscillator XO Crystal Oscillator XOR eXclusive OR Page SX1210 www.semtech.com ...
Page 5
... ADVANCED COMMUNICATIONS & SENSING This product datasheet contains a detailed description of the SX1210 performance and functionality. Please consult the Semtech website for the latest updates or errata. 1. General Description The SX1210 is a single chip FSK and OOK receiver capable of operation in the 863-870 MHz and 902-928 MHz license free ISM frequency bands, as well as the 950 - 960 MHz frequency band ...
Page 6
... ADVANCED COMMUNICATIONS & SENSING 1.2. Pin Diagram The following diagram shows the pins arrangement of the QFN package, top view. Notes: yyww refers to the date code ------ refers to the lot number th Rev 2– Sept 8 , 2008 Figure 2: SX1210 Pin Diagram Page SX1210 www.semtech.com ...
Page 7
... NRZ data output (Continuous mode) O Interrupt output O Interrupt output O PLL lock detection output I/O Connect to GND I/O Connect to GND VDD I Supply voltage O Regulated supply of the analog circuitry O Regulated supply of digital circuitry NC - Connect to GND I/O Connect to GND RFI I RF input NC - Connect to GND Page SX1210 www.semtech.com ...
Page 8
... Storage temperature Input level Conditions Crystal oscillator running Frequency synthesizer running Page SX1210 Min Max Unit -0.3 3.7 V -55 125 ° dBm Min Max Unit 2.1 3.6 V -40 +85 ° dBm Min Typ Max Unit - 0.1 2 µ µA - 1.3 1 3.0 3.5 mA www.semtech.com ...
Page 9
... MHz step - 27 MHz step - Page SX1210 Typ Max Unit - 870 MHz - 928 MHz - 960 MHz - 200 Kb Kb/s 50 200 kHz 12.8 15 MHz 2 - kHz 1 500 800 µs 180 - µs 200 - µs 250 - µs 260 - µs 290 - µs 320 - µs 340 - µs www.semtech.com ...
Page 10
... -101 - dBm - -113 - dBm - -106 - dBm - -111 - dBm - -105 - dBm - -12 - dBc - -48 - dBm - -37 - dBm - -33 - dBm - 250 kHz - 400 kHz - -28 - dBm - 280 500 µs - 600 900 µs - 400 - µs - 400 - µs - 460 - µs - 480 - µs - 520 - µs - 550 - µs - 600 - µ 1/Fdev www.semtech.com ...
Page 11
... NSS_DATA rising to falling edge. Note: on pin 10 (XTAL_P) and 11 (XTAL_N), maximum voltages of 1.8V can be applied. th Rev 2– Sept 8 , 2008 Conditions Min 0.8*VDD - Imax=1mA 0.9*VDD Imax=-1mA - - - 2 250 312 500 625 500 625 Page SX1210 Typ Max Unit - - V - 0.2*VDD 0.1*VDD MHz - 1 MHz - - µ www.semtech.com ...
Page 12
... This internal regulated power supply structure is described below: th Rev 2– Sept 8 , 2008 RSSI LO2 Generator Figure 3: SX1210 Detailed Block Diagram Page SX1210 OOK IRQ_0 demod IRQ_1 BitSync MOSI Control MISO FSK SCK demod NSS_CONFIG NSS_DATA CLKOUT DATA TEST(8:0) LO1 Rx PLL_LOCK LO2 Rx www.semtech.com ...
Page 13
... External Supply Reg_top 1.4 V Reg_dig Reg_ana 1.0 V 1.0 V Biasing analog Biasing digital blocks blocks VR_1V VR_DIG Pin 27 Pin 28 1ųF 220nF Y5V X7R Figure 4: Power Supply Breakdown Page SX1210 Reg_VCO 0.85 V Biasing : -VCO circuit -Ext. VCO tank VR_VCO Pin 3 100nF X7R www.semtech.com ...
Page 14
... Startup times and reference frequency spurs as specified. th Rev 2– Sept 8 , 2008 ÷75.(P PFD ÷(R +1) i Fcomp LF_P XT_P Figure 5: Frequency Synthesizer Description ÷8 90° Figure 6: LO Generator Fcomp PLLBW ≤ 6 Page +1)+ Vtune LF_M VCO_P VCO_M VR_VCO LO1 Rx Receiver LOs I LO2 Rx Q www.semtech.com SX1210 ...
Page 15
... PLL Loop Filter To adequately reject spurious components arising from the comparison frequency Fcomp, an external 2 loop filter is employed. th Rev 2– Sept 8 , 2008 915- 950- 928 960 ≤ ≤ Vtune ( mV ) 150 mV Page SX1210 nd order www.semtech.com ...
Page 16
... Note that from Section 3.3. recommended that IF2 be set to 100 kHz. th Rev 2– Sept 8 , 2008 NS & SENSING RL1 CL2 CL1 Figure 7: Loop Filter 9 = Frf , fsk Flo Fxtal ( = Frf fsk − Frf , ook Flo Fxtal ( = + Frf , ook Page LF_M LF_P ] ) + + ) − SX1210 www.semtech.com ...
Page 17
... Figure 9: FSK Receiver Setting First down-conversion IF1 LO2 Rx Figure 10: OOK Receiver Setting Page SX1210 OOK demod Control logic -Pattern recognition Bit -FIFO handler synchronizer -SPI interface -Packet handler FSK demod th of the RF frequency Image Channel Frequencyl LO1 Rx frequency Image Channel Frequency LO1 Rx frequency www.semtech.com ...
Page 18
... Fc BW ButterfFil t passive , filter Low-pass filter for FSK ( RXParam_PolyFilt_on=’’0’’ Polyphase filter for OOK ( RXParam_PolyFilt_on=’’1’’ ) the polyphase filter - Figure 11: Active Channel Filter Description Page ButterFilt f f requency C Canceled side of f requenc y www.semtech.com SX1210 ...
Page 19
... RXParam_ButterFilt. However, the whole receiver chain influences this cutoff frequency. Thus the channel select and resultant filter bandwidths are summarized in the following chart: th Rev 2– Sept 8 , 2008 ⎡ ⎤ Fdev ⎢ ⎥ FSK ⎣ ⎦ 2 > FSK drifts OOK Tbit = fo 100 kHz = RXParam _ PolypFilt " 0011 " − > OOK drifts Page SX1210 www.semtech.com ...
Page 20
... Butterworth Filter's BW, FSK 450 400 350 300 250 200 150 100 Val (RXParam_ButterFilt) [d] Figure 12: Butterworth Filter's Actual BW Polyphase Filter's BW, OOK 450 400 350 300 250 200 150 100 Val (RXParam_ButterFilt [d] RXParam_PolypFilt="0011" Figure 13: Polyphase Filter's Actual BW Page SX1210 Actual Theoretical Actual Theoretical www.semtech.com ...
Page 21
... IRQParam_Rx_stby_irq1. Figure 15 shows the timing diagram of the RSSI interrupt source, with IRQParam_RSSI_irq_thresh set to 28. th Rev 2– Sept 8 , 2008 RSSI Response -100 -80 -60 Pin [dBm] IF_Gain=00 IF_Gain=01 IF_Gain=10 Figure 14: RSSI Dynamic Range to the IRQ0 or IRQ1 Page -40 -20 0 IF_Gain=11 pins via bits IRQParam_Rx_stby_irq0 www.semtech.com SX1210 or ...
Page 22
... RXParam_OOK_thresh_type register. The recommended mode of operation is the “Peak” threshold mode, illustrated below in Figure 16: th Rev 2– Sept 8 , 2008 Clear interrupt Figure 15: RSSI IRQ Timings = 2 = Fdev IF 100 kHz = MCParam _ Freq _ dev " 00000011 2 * Fdev β = ≥ Page SX1210 " www.semtech.com ...
Page 23
... MCParam_OOK_floor_thresh. th Rev 2– Sept 8 , 2008 Zoom Zoom Decay defined in RXPAram_OOK_thresh_step Period as defined in RXParam_OOK_thresh_dec_period Figure 16: OOK Demodulator Description Page SX1210 ‘’Peak -6dB’’ Threshold ‘’Floor’’ threshold defined by MCParam_OOK_floor_thresh Noise floor of receiver Time Fixed 6dB difference www.semtech.com ...
Page 24
... Rev 2– Sept 8 , 2008 NS & SENSING Set SX1210 in OOK Rx mode Adjust Bit Rate, Channel filter BW Default RXParam_OOK_thresh setting No input signal Continuous Mode Monitor DATA pin (pin 20) Increment MCParam_OOK_floor_thres Glitch activity Optimization complete Figure 17: Floor Threshold Optimization Page DATA ? SX1210 www.semtech.com ...
Page 25
... The BitSync is automatically activated in Buffered and Packet modes. The bit synchronizer bit-rate is controlled by MCParam_BR. For a given bit rate, this parameter is determined by: th Rev 2– Sept 8 , 2008 = ⇒ _ OOK _ cutoff 00 = ⇒ _ OOK _ cutoff 11 output DATA mode DCLK IRQ_1 Figure 18: BitSync Description F = XTAL MCParam Page Fcutoff π Fcutoff π www.semtech.com SX1210 ...
Page 26
... Bit Synchronizer and Active channel filter settings are a function of the reference oscillator crystal frequency, F Settings other than those programmable with a 12.8 MHz crystal can be obtained by selection of the correct reference oscillator frequency. Please contact your local Semtech representative for further details. 3.3.13. Data Output After OOK or FSK demodulation, the baseband signal is made available to the user on pin 20, DATA, when Continuous mode is selected ...
Page 27
... BitSync and all digital features if enabled Receive FS mode Comment mode NSS_CONFIG has the priority over Input Input NSS_DATA Input Input Output only if NSS_CONFIG or Input Input NSSDATA=’0’ Input Input Input Input Output (1) Output Output (1) Output Output High-Z Output Output Output Output (4) (4) Page SX1210 www.semtech.com ...
Page 28
... Buffered mode. The maximum payload length is limited to the maximum FIFO limit of 64 bytes th Rev 2– Sept 8 , 2008 SX1210 CONTROL PACKET FIFO HANDLER (+SR) Page SX1210 DATA IRQ_0 IRQ_1 SPI CONFIG NSS_DATA SCK DATA MOSI MISO www.semtech.com ...
Page 29
... As described below, only one interface can be selected at a time with NSS_CONFIG having the priority: th Rev 2– Sept 8 , 2008 Continuous Buffered Packet NSS_CONFIG MOSI SPI MISO CONFIG SCK (slave) SPI DATA (slave) NSS_DATA Page SX1210 NSS_CONFIG MOSI MISO SCK NSS_DATA µ C (master) www.semtech.com ...
Page 30
... Rev 2– Sept 8 , 2008 SPI Interface Config Data Config None A(0) stop D(7) D(6) D(5) D(4) D(3) D(2) D(1) D(0) Address = D(7) D(6) D(5) D(4) D(3) D(2) D(1) Figure 21: Write Register Sequence Page SX1210 New value at address A1 Current value at address A1* D(0) www.semtech.com HZ ...
Page 31
... D(7) D(6) D(5) D(4) D(3) D(2) D(1) Figure 22: Read Register Sequence byte read D1(4) D1(3) D1(2) D1(1) D1(0) HZ Figure 23: Read Bytes Sequence (ex: 2 bytes) Page Current value at address byte read D2(7) D2(6) D2(5) D2(4) D2(3) D2(2) D2(1) D2(0) SX1210 www.semtech.com ...
Page 32
... Data is lost and the flag should be cleared by writing a 1, note that the FIFO will also be cleared. Fifo_threshold: Fifo_threshold interrupt source’s behavior can be programmed via MCParam_Fifo_thresh (B value). This behavior is illustrated in Figure 25. th Rev 2– Sept 8 , 2008 byte1 byte0 8 SR (8bits) 1 MSB Figure 24: FIFO and Shift Register (SR) Page SX1210 FIFO LSB www.semtech.com ...
Page 33
... Sync word. th Rev 2– Sept 8 , 2008 B+1 Rx & Stby Figure 25: FIFO Threshold IRQ Source Behavior Comments In Packet & Buffered modes FIFO can be read in Stby after Rx Bit N-1 = Bit N = Sync_value[1] Sync_value[0] Figure 26: Sync Word Recognition Page SX1210 # of bytes in FIFO www.semtech.com ...
Page 34
... The packet handler is the block used in Packet mode. Its functionality is fully described in section 5.5. 5.2.5. Control The control block configures and controls the full chip’s behavior according to the settings programmed in the configuration registers. th Rev 2– Sept 8 , 2008 Page SX1210 www.semtech.com ...
Page 35
... As illustrated in Figure 27, in Continuous mode the NRZ data from the demodulator is directly accessed by the uC on the DATA pin (20). The SPI Data, FIFO and packet handler are thus inactive. Rx Data Rx SYNC RECOG. Datapath th Rev 2– Sept 8 , 2008 SX1210 CONTROL Figure 27: Continuous Mode Conceptual View Page SX1210 DATA IRQ_0 IRQ_1(DCLK) SPI NSS_CONFIG CONFIG SCK MOSI MISO www.semtech.com ...
Page 36
... The tables below give the description of the interrupts available in Continuous mode. Table 15: Interrupt Mapping in Continuous Rx Mode Note: In Continuous mode, no interrupt is available in Stby mode th Rev 2– Sept 8 , 2008 Figure 28: Rx Processing in Continuous Mode Rx_stby_irq_0 Rx 00 (d) Sync 01 RSSI IRQ_0 1x - DCLK IRQ_1 Page SX1210 www.semtech.com ...
Page 37
... SCK MOSI MISO Figure 29: uC Connections in Continuous Mode Description Defines data operation mode ( Defines IRQ_0 source in Rx mode Enables Sync word recognition Defines Sync word size Defines the error tolerance on Sync word recognition Defines Sync word value Page Continuous) www.semtech.com SX1210 ...
Page 38
... Rev 2– Sept 8 , 2008 SX1210 CONTROL FIFO (+SR) Figure 30: Buffered Mode Conceptual View Page SX1210 IRQ_0 IRQ_1 SPI NSS_CONFIG CONFIG NSS_DATA SCK DATA MOSI MISO www.semtech.com ...
Page 39
... Rx_stby_irq_x IRQ_0 IRQ_1 Table 17: Interrupt Mapping in Buffered Rx and Stby Modes th Rev 2– Sept 8 , 2008 Sync ( Write_byte 10 /Fifoempty 11 Sync 00 ( Fifofull 10 RSSI 11 Fifo_threshold Page SX1210 b10 b11 b12 b13 b14 b15 b14 b13 b12 b11 b10 Stby - - /Fifoempty - - Fifofull - Fifo_threshold www.semtech.com b16 b15 ...
Page 40
... Defines FIFO threshold Defines IRQ_0 source in Rx & Stby modes Defines IRQ_1 source in Rx & Stby modes Defines FIFO filling method Controls FIFO filling status Defines Sync word size Defines the error tolerance on Sync word detection Defines Sync word value Page SX1210 uC www.semtech.com ...
Page 41
... The length of the payload is set by the PKTParam_Payload_length register and is limited by the size of the FIFO selected. th Rev 2– Sept 8 , 2008 SX1210 CONTROL PACKET FIFO HANDLER (+SR) Figure 33: Packet Mode Conceptual View Page SX1210 IRQ_0 IRQ_1 SPI NSS_CONFIG CONFIG NSS_DATA SCK DATA MOSI MISO www.semtech.com ...
Page 42
... Optional Address byte (Node ID). Message data. Optional 2-bytes CRC checksum. th Rev 2– Sept 8 , 2008 Optional DC free data decoding CRC checksum calculation Sync Word Address Message bytes byte 0 to (FIFO size) bytes Payload/FIFO Figure 34: Fixed Length Packet Format Page SX1210 CRC 2-bytes www.semtech.com ...
Page 43
... Rev 2– Sept 8 , 2008 Optional DC free data decoding CRC checksum calculation Sync Word Length Address Message 0 to (FIFO size - 1) bytes bytes byte byte Payload/FIFO Figure 35: Variable Length Packet Format can also be fully or Page SX1210 CRC 2-bytes partially retrieved in Stby www.semtech.com mode via ...
Page 44
... Payload_ready interrupt goes high. Please note that in both cases, the two CRC checksum bytes are stripped off by the packet handler and only the payload is made available in the FIFO. The CRC is based on the CCITT polynomial as shown in Figure 36. This implementation also detects errors due to leading and trailing zeros. th Rev 2– Sept 8 , 2008 Page SX1210 www.semtech.com ...
Page 45
... SX1210 receiver side by XORing with the same random sequence as the Tx. Payload de-whitening is thus made transparent for the user, who still retrieves NRZ data from the FIFO. th Rev 2– Sept 8 , 2008 CRC Polynomial = Figure 36: CRC Implementation 1/BR ...Sync Figure 37: Manchester Decoding Page Payload... SX1210 ... t 0 ... ... www.semtech.com ...
Page 46
... IRQ_0: if none of the relevant IRQ sources are used. In this case, leave floating. th Rev 2– Sept 8 , 2008 Figure 38: Data Whitening Implementation Rx 00 (d) Payload_ready 01 Write_byte 10 /Fifoempty 11 Sync or Adrs_match* 00 (d) CRC_OK 01 Fifofull 10 RSSI 11 Fifo_threshold SX1210 IRQ_0 IRQ_1 NSS_CONFIG NSS_DATA SCK MOSI MISO Figure 39: uC Connections in Packet Mode Page ite Stby - - /Fifoempty - - Fifofull - Fifo_threshold uC www.semtech.com SX1210 0 X ...
Page 47
... IRQ_1: if none of the relevant IRQ sources are used. In this case, leave floating. In addition, DATA pin (unused in packet mode) should be pulled-up to VDD through a 100 kΩ resistor. Please refer to Table 11 for the SX1210’s pin configuration. th Rev 2– Sept 8 , 2008 Page SX1210 www.semtech.com ...
Page 48
... Enables Manchester decoding Length in fixed format, max length in variable format Defines node address for address filtering Defines packet format (fixed or variable length) Enables de-whitening process Enables CRC calculation/check Enables and defines address filtering Enables FIFO autoclear if CRC failed Page SX1210 www.semtech.com ...
Page 49
... Selection between the two sets of frequency dividers of the PLL, Ri/Pi/Si r/w 0 R1/P1/S1 selected(d) 1 R2/P2/S2 selected Modulation type: r/w 01 OOK 10 FSK (d) r/w Data operation mode LSB (refer to Data_Mode_1 (Bit 2 Addr 1) OOK demodulator threshold type: 00 fixed threshold mode r/w 01 peak mode (d) 10 average mode 11 reserved Page SX1210 www.semtech.com ...
Page 50
... R2, P2, S2 generate 920.0 MHz in FSK mode S counter, active when RPS_select=”1” r/w (d): 32h; default values of R2, P2, S2 generate 920.0 MHz in FSK mode Reserved r/w (d): “00111000” Page SX1210 Data Operation Mode Continuous (d) Buffered Packet www.semtech.com ...
Page 51
... Automatically starts when a sync word is detected (d) 1 Manually controlled by Fifo_fill FIFO filling status/control (Buffered mode only): If Fifo_fill_method = ‘0’: (d) r/w/ c Goes high when FIFO is being filled (sync word has been detected) Writing ‘1’ clears the bit and waits for a new sync word (if Fifo_overrun_clr=0) Page SX1210 www.semtech.com ...
Page 52
... Writing ‘1’ clears the bit PLL status: r/w/ 0 not locked c 1 locked Writing a ‘1’ clears the bit PLL_lock detect flag mapped to pin 23: r/w 0 Lock detect disabled, pin 23 is High-Z 1 Lock detect enabled(d) RSSI threshold for interrupt (coded as RSSI) (d): “00000000” Page SX1210 www.semtech.com ...
Page 53
... Sync word recognition: r/w 0 off ( Sync word size bits r bits 10 24 bits 11 32 bits (d) Number of errors tolerated in the Sync word recognition error (d) r error 10 2 errors 11 3 errors Reserved r/w (d):”0” Page SX1210 + 1 Val ( ButterFilt ) . 8 ( PolypFilt _ center ) 8 www.semtech.com ...
Page 54
... BR / 32.π Description st r/w 1 Byte of Sync word (d): “00000000” Byte of Sync word (only used if Sync_size ≠ 00) (d): “00000000” Byte of Sync word (only used if Sync_size = 1x) (d): “00000000” Byte of Sync word (only used if Sync_size = 11) (d): “00000000” Page SX1210 www.semtech.com ...
Page 55
... Rev 2– Sept 8 , 2008 RW Description r/w Clkout control 0 Disabled 1 Enabled, Clk frequency set by Clkout_freq (d) r/w Frequency of the signal provided on CLKOUT: fclkout = if Clkout_freq = “00000” f xtal f = xtal fclkout 2 ⋅ Clkout _ freq (d): 01111 (= 427 kHz) r/w Reserved (d): “00” Page SX1210 otherwise www.semtech.com ...
Page 56
... Node_adrs & 0x00 accepted, else rejected. 11 Node_adrs & 0x00 & 0xFF accepted, else rejected. r CRC check result for current packet (READ ONLY): 0 Fail 1 Pass r/w FIFO auto clear if CRC failed for current packet (d) 1 off r/w Reserved (d): “0000000” recommended to set to “1000000” Page SX1210 www.semtech.com ...
Page 57
... GUI To aid the user with calculating appropriate R, P and S values, software is available to perform the frequency calculation. The SX1210 PLL frequency Calculator Software can be downloaded from the Semtech website. 7.2.2. .dll for Automatic Production Bench The Dynamically Linked Library (DLL) used by the software to perform these calculations is also provided, free of charge, to users, for inclusion in automatic production testing ...
Page 58
... Receiver is ready : -RSSI sampling is valid after a 1/Fdev period -Received data is valid Wait TS FS Set SX1210 in Rx mode Wait for Receiver settling Set SX1210 in FS mode Wait for PLL settling Figure 40: Optimized Rx Cycle Page SX1210 Time SX1210 can be put in Any other mode www.semtech.com ...
Page 59
... IDDFS 1.3mA typ. Wait TS RE SX1210 is now ready for data reception Wait TS HOP 1. Set R2/P2/S2 2. Set SX1210 in FS mode, change MCParam_Band if needed, then switch from R1/P1/S1 to R2/P2/S2 Figure 41: Rx Hop Cycle Page SX1210 Time Set SX1210 back in Rx mode www.semtech.com ...
Page 60
... Please note that while pin 13 is driven high, an over current consumption ten milliamps can be seen on VDD. th Rev 2– Sept 8 , 2008 Undefined Wait for Chip is ready from 10 ms this point on Figure 42: POR Timing Diagram Wait for > 100 High-Z ’’1’’ High-Z Figure 43: Manual Reset Timing Diagram Page SX1210 Chip is ready from this point on www.semtech.com ...
Page 61
... PCB technology (2 layers, 1.6mm, std via & clearance) => low cost Its performance is quasi-insensitive to dielectric thickness => minimal design effort to transfer to other PCB technologies (thickness layers, etc...) The layers description is illustrated in Figure 45: th Rev 2– Sept 8 , 2008 Figure 44: Reference Design Circuit Schematic Page SX1210 www.semtech.com ...
Page 62
... ADVANCED COMM UNICATIONS & SENSING The layout itself is illustrated in Figure 46. Please contact Semtech for gerber files. 9mm 7.5.3. Bill Of Material Table 29: Reference Design BOM Ref Value 868MHz 915MHz U1 SX1210 Q1 12.8 MHz R2 6.8 kΩ C1 1uF C2 1uF C3 220 nF C5 100 680 C10 5.4nH L1 ...
Page 63
... ADVANCED COMMUNICATIONS & SENSING 7.5.4. Ordering Information for Tools The modules described in section 7.5 can be ordered through your Semtech representative for evaluation purpose: Table 30: Tools Ordering Information Part Number Description SM1211E868 2 layer RF module, 868 MHz band (Transceiver is used to evaluate the receiver) ...
Page 64
... Hex kHz 117 C1 150 16.67 113 C1 150 12.5 110 A0 125 9.52 108 A0 125 8 105 A0 125 4.76 102 A0 125 2.41 102 A0 125 1.56 th Rev 2– Sept 8 , 2008 Max. drift Actual kHz +/- ppm 154 41 154 46 129 22 129 23 129 27 129 30 129 30 Page SX1210 www.semtech.com ...
Page 65
... Frequency [MHz] Sensitivity SAW Ripple Figure 48: Sensitivity Across the 915 MHz Band Page 14.0 12.0 10.0 8.0 6.0 4.0 2.0 0.0 -2.0 868 869 870 14.0 12.0 10.0 8.0 6.0 4.0 2.0 0.0 -2.0 920 922 924 926 928 www.semtech.com SX1210 ...
Page 66
... LO Drift [kHz] Figure 49: FSK Sensitivity Loss vs. LO Drift Sensitivity Loss vs. LO Drift 6.0 5.0 4.0 3.0 2.0 1.0 0.0 -1.0 -60 -40 - Drift [kHz] Figure 50: OOK Sensitivity Loss vs. LO Drift Page SX1210 100 www.semtech.com ...
Page 67
... Rev 2– Sept 8 , 2008 Sensitivity vs. Fc 100 150 200 Fc of Active Filter [kHz] Figure 51: FSK Sensitivity vs Sensitivity Change vs. (Fc-Fo) 50 100 150 200 Fc-Fo [kHz] Figure 52: OOK Sensitivity Change vs Page SX1210 250 300 250 300 350 www.semtech.com ...
Page 68
... Rev 2– Sept 8 , 2008 Sensitivity Stability 2.40 2.70 3.00 VDD [V] Figure 53: Sensitivity Stability Sensitivity Change over Bit Rate [kb/s] Figure 54: FSK Sensitivity vs. BR Page SX1210 3.30 3.60 85°C 25°C 0°C -40°C 75 100 www.semtech.com ...
Page 69
... Rev 2– Sept 8 , 2008 Sensitivity Change over the BR 4 6.5 9 11.5 Bit Rate [kbps] Figure 55: OOK Sensitivity vs. BR ACR in FSK Mode -600 -400 -200 0 200 Offset [kHz] Figure 56: ACR in FSK Mode Page SX1210 14 16.5 400 600 800 1000 www.semtech.com ...
Page 70
... Rejection (CCR, Offset = 0kHz) is positive due to the DC cancellation process of the zero-IF architecture In OOK mode, the polyphase filter efficiency is limited, thus limiting the adjacent channel rejection at 2xFo distance. th Rev 2– Sept 8 , 2008 ACR in OOK Mode -200 -100 0 -10 -20 Offset [kHz] Figure 57: ACR in OOK Mode Page SX1210 100 200 300 www.semtech.com ...
Page 71
... ADVANCED COMMUNICATIONS & SENSING 8. Packaging Information 8.1. Package Outline Drawing SX1210 is available in a 32-lead TQFN package as shown in Figure 58 below. 8.2. PCB Land Pattern th Rev 2– Sept 8 , 2008 Figure 58: Package Outline Drawing Figure 59: PCB Land Pattern Page SX1210 www.semtech.com ...
Page 72
... Rev 2– Sept 8 , 2008 Direction of Feed Reel Reel Reel Ao/Bo Ko Size Width 5.25 1.10 330.2 12.4 +/-0.2 +/-0.1 Figure 60: Tape & Reel Dimensions Page SX1210 Min. Min.Trail QTY per Leader er Length Reel Length 400 400 3000 www.semtech.com ...
Page 73
... CUSTOMER’S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise. ...