SP6651AEU-L Exar Corporation, SP6651AEU-L Datasheet - Page 8

• Manufacturer Part Number: SP6651AEU-L
• Description: IC CONV SYNC BUCK 800MA 10MSOP
• Manufacturer: Exar Corporation
• Type: Step-Down (Buck)r
• Series: -r

Specifications of SP6651AEU-L

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 1 V ~ 5.5 V
• Current - Output: 800mA
• Voltage - Input: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
• Primary Input Voltage: 5.5V
• No. Of Outputs: 1
• Output Voltage: 5V
• Output Current: 800mA
• No. Of Pins: 10
• Operating Temperature Range: -40°C To +85°C
• Supply Voltage Range: 2.7V To 5.5V
• Mounting Style: SMD/SMT
• Frequency - Switching: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

point RESET is held low until V
regulation. Once RESET occurs T
is reset, and the T
blank the loop comparator from starting a new
charge cycle for a minimum period. This blank-
ing period occurs during the noisy LX transition
to discharge, where spurious comparator states
may occur. For T
discharge or wait state until the loop comparator
starts the next charge cycle by DRVON going
high.
If an over current occurs during charge the loop
is interrupted and DRVON is RESET. The off-
time one-shot pulse width is widened to T
K
for that time. At the end of the off-time the loop
is released and controlled by VOLOW. In this
manner maximum inductor current is controlled
on a cycle-by-cycle basis. An assertion of UVLO
(undervoltage lockout) or TSD (thermal shut-
down) holds the loop in no-charge until the fault
has ended.
On-Time Control - Discharge Phase
The discharge phase follows with the high side
PMOS switch opening and the low side NMOS
switch closing to provide a discharge path for
the inductor current. The decreasing inductor
current and the load current cause the output
voltage to drop. Under normal load conditions
when the inductor current is below the pro-
grammed limit, the off-time will continue until
the output voltage falls below the regulation
threshold, which initiates a new charge cycle via
the loop comparator.
The inductor current “floats” in continuous con-
duction mode. During this mode the inductor
peak current is below the programmed limit and
the valley current is above zero. This is to satisfy
load currents that are greater than half the mini-
mum current ripple. The current ripple, I
defined by the equation:
I
Date: 5/25/04
LR
OFF
≈
/ V
K
L
ON
OUT
*
, which holds the loop in discharge
V
OFF
IN
OFF
- V
> T
one-shot is triggered to
V
OUT
IN
BLANK
- V
SP6651A High Efficiency 800mA Synchronous Buck Regulator
- I
OUT
OUT
the loop is in a
OUT
ON
* R
minimum
CH
is above
LR
OFF
, is
=
8
where:
L = Inductor value
I
R
If the I
with (V
to:
I
For most applications, the inductor current ripple
controlled by the SP6651A is constant regard-
less of input and output voltage. Because the
output voltage ripple is equal to:
V
where:
R
the output ripple of the SP6651A regulator is
independent of the input and output voltages.
For battery powered applications, where the
battery voltage changes significantly, the
SP6651A provides constant output voltage ripple
through-out the battery lifetime. This greatly
simplifies the LC filter design.
The maximum loop frequency in CCM is de-
fined by the equation:
F
where:
F
R
Ignoring conduction losses simplifies the loop
frequency to:
F
AND’ing the loop comparator and the on-timer
reduces the switching frequency for load cur-
rents below half the inductor ripple current. This
increases light load efficiency. The minimum
on-time insures that the inductor current ripple
OUT
LR
LP
LP
LP
CH
ESR
DC
OUT
THEORY OF OPERATION : Continued
≈
= CCM loop frequency
≈
= PMOS on resistance, 0.3Ω typ.
≈
= NMOS on resistance, 0.3Ω typ.
= Load current
= ESR of the output capacitor
(ripple) = I
K
(V
K
OUT
IN
L
K
1
ON
ON
IN
ON
- V
* R
- V
*
* [V
OUT
CH
OUT
V
V
), the above equation simplifies
LR
IN
OUT
IN
term is negligible compared
) * (V
+ I
* R
OUT
© Copyright 2004 Sipex Corporation
ESR
* (V
OUT
* (R
IN
+ I
- V
DC
OUT
OUT
- R
* R
CH
)
DC
)]
)