FDME1023PZT Fairchild Semiconductor, FDME1023PZT Datasheet - Page 2

MOSFET P-CH 20V 2.6A 6-MICROFET

FDME1023PZT

Manufacturer Part Number
FDME1023PZT
Description
MOSFET P-CH 20V 2.6A 6-MICROFET
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®r
Datasheet

Specifications of FDME1023PZT

Fet Type
2 P-Channel (Dual)
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
142 mOhm @ 2.3A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
2.6A
Vgs(th) (max) @ Id
1V @ 250µA
Gate Charge (qg) @ Vgs
7.7nC @ 4.5V
Input Capacitance (ciss) @ Vds
405pF @ 10V
Power - Max
600mW
Mounting Type
Surface Mount
Package / Case
6-MLP, 6-MicroFET™
Configuration
Single
Transistor Polarity
P-Channel
Resistance Drain-source Rds (on)
95 mOhms
Drain-source Breakdown Voltage
- 20 V
Continuous Drain Current
- 2.3 A
Power Dissipation
1.3 W
Maximum Operating Temperature
+ 150 C
Forward Transconductance Gfs (max / Min)
7 S
Gate Charge Qg
5.5 nC
Minimum Operating Temperature
- 55 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
©2010 Fairchild Semiconductor Corporation
FDME1023PZT Rev.C1
NOTES:
1. R
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection ESD. No gate overvoltage rating is implied.
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
BV
ΔBV
I
I
V
r
g
C
C
C
t
t
t
t
Q
Q
Q
V
t
Q
ΔV
DSS
GSS
d(on)
r
d(off)
f
rr
DS(on)
FS
the user's board design.
GS(th)
SD
iss
oss
rss
ΔT
ΔT
g
gs
gd
rr
Symbol
θJA
DSS
GS(th)
DSS
J
J
is determined with the device mounted on a 1 in
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Parameter
2
T
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
a. 90 °C/W when mounted on
J
a 1 in
= 25 °C unless otherwise noted
2
pad of 2 oz copper.
I
I
V
V
V
I
V
V
V
V
V
T
V
V
f = 1 MHz
V
V
V
V
V
I
D
D
D
F
J
DS
GS
GS
GS
GS
GS
GS
GS
DS
DS
DD
GS
DD
GS
GS
= -250 μA, V
= -250 μA, referenced to 25 °C
= -250 μA, referenced to 25 °C
= 125 °C
= -2.3 A, di/dt = 100 A/μs
= -16 V, V
= -4.5 V, I
= -10 V, V
= -4.5 V
= ±8 V, V
= V
= -4.5 V, I
= -2.5 V, I
= -1.8 V, I
= -1.5 V, I
= -4.5 V, I
= -10 V, I
= -4.5 V, R
= -10 V, I
= 0 V, I
DS
2
Test Conditions
, I
S
D
= -0.9 A
D
DS
D
GS
D
D
D
D
D
D
GS
= -250 μA
GS
GEN
= -1 A,
= -2.3 A,
= -2.3 A
= -2.3 A
= -1.8 A
= -1.5 A
= -1.2 A
= -2.3 A,
= 0 V
= 0 V,
= 0 V
= 0 V
= 6 Ω
(Note 2)
θJC
is guaranteed by design while R
-0.4
Min
-20
b. 195 °C/W when mounted on a
minimum pad of 2 oz copper.
-0.8
305
4.4
-0.6
120
150
190
128
4.7
4.8
5.5
0.6
1.4
Typ
55
50
16
33
16
-12
95
2
7
θCA
-1.2
Max
405
-1.0
142
213
331
530
190
±10
7.7
75
75
10
10
53
29
29
10
-1
www.fairchildsemi.com
is determined by
mV/°C
mV/°C
Units
nC
pF
pF
pF
nC
nC
nC
μA
μA
ns
ns
ns
ns
ns
V
V
V
S

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