SI3010-FS Silicon Laboratories Inc, SI3010-FS Datasheet - Page 66

• Manufacturer Part Number: SI3010-FS
• Description: IC SI2401 LINE-SIDE DAA 16SOIC
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3010-FS

• Data Format: V.92
• Interface: Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Baud Rates: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 336-1096

Si3018/19/10
Register 23. Ring Validation Control 2
Reset settings = 0010_1101
66
Bit
6:3
2:0
Name
Type
7
Bit
RCC[2:0]
RTO[3:0]
RDLY[2]
RDLY[2]
Name
R/W
D7
Ring Delay Bit 2.
This bit, in combination with the RDLY[1:0] bits (Register 22), set the amount of time
between when a ring signal is validated and when a valid ring signal is indicated.
RDLY[2]
0
0
0
.
.
.
1
Ring Timeout.
These bits set when a ring signal is determined to be over after the most recent ring thresh-
old crossing.
RTO[3:0]
0000
0001
0010
.
.
.
1111
Ring Confirmation Count.
These bits set the amount of time that the ring frequency must be within the tolerances set
by the RAS[5:0] bits and the RMX[5:0] bits to be classified as a valid ring signal.
RCC[2:0]
000
001
010
011
100
101
110
111
D6
D5
RTO[3:0]
RDLY[1:0]
00
01
10
11
R/W
1024
Ring Timeout
1920
Ring Confirmation Count Time
100
150
200
256
384
512
640
80
128
256
D4
m
m
m
m
m
m
m
m
m
m
m
s
m
s
s
s
s
s
s
s
s
s
s
s
D3
Rev. 1.05
1792
Delay
0
256
512
m
s
m
m
m
s
s
s
D2
Function
RCC[2:0]
R/W
D1
D0