HCPL3700 Fairchild Semiconductor, HCPL3700 Datasheet

Logic Output Optocouplers AC/DC To Logic Interface

HCPL3700

Manufacturer Part Number
HCPL3700
Description
Logic Output Optocouplers AC/DC To Logic Interface
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of HCPL3700

Fall Time
400 ns
Logic Gate Type
Darlington Configuration
Rise Time
400 ns
Configuration
1 Channel
Isolation Voltage
2500 Vrms
Output Type
Open Collector
Maximum Propagation Delay Time
40000 ns
Maximum Forward Diode Voltage
0.65 V
Maximum Forward Diode Current
4.4 mA
Maximum Continuous Output Current
30 mA
Maximum Power Dissipation
210 mW
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Package / Case
DIP-8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
HCPL3700_NL

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HCPL3700
Manufacturer:
AGILENT
Quantity:
20 000
Part Number:
HCPL3700
Manufacturer:
QTC
Quantity:
20 000
Part Number:
HCPL3700SD
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
©2005 Fairchild Semiconductor Corporation
HCPL3700 Rev. 1.0.3
HCPL3700
AC/DC to Logic Interface Optocoupler
Features
Applications
Schematics
AC or DC input
Programmable sense voltage
Logic level compatibility
Threshold guaranteed over temperature (0°C to 70°C)
Optoplanar™ construction for high common mode
immunity
UL recognized (file # E90700)
VDE certified – ordering option ‘V’, e.g., HCPL3700V
Low voltage detection
5 V to 240 V AC/DC voltage sensing
Relay contact monitor
Current sensing
Microprocessor Interface
Industrial controls
POWER
AC/DC
GND 1
DC+
DC-
AC
AC
1
2
3
4
R
X
HCPL-3700
8
7
6
5
GND 2
LOGIC
V
NC
V
GND
CC
O
Package Outlines
Description
The HCPL-3700 voltage/current threshold detection
optocoupler consists of an AlGaAs LED connected to a
threshold sensing input buffer IC which are optically cou-
pled to a high gain darlington output. The input buffer
chip is capable of controlling threshold levels over a wide
range of input voltages with a single resistor. The output
is TTL and CMOS compatible.
A 0.1µF bypass capacitor must be connected
between pins 8 and 5.
8
Input
H
L
TRUTH TABLE
(Positive Logic)
1
8
Output
H
L
1
8
www.fairchildsemi.com
August 2008
1

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HCPL3700 Summary of contents

Page 1

... Logic level compatibility Threshold guaranteed over temperature (0°C to 70°C) Optoplanar™ construction for high common mode immunity UL recognized (file # E90700) VDE certified – ordering option ‘V’, e.g., HCPL3700V Applications Low voltage detection 240 V AC/DC voltage sensing Relay contact monitor ...

Page 2

... Symbol V Supply Voltage CC T Operating Temperature A f Operating Frequency ©2005 Fairchild Semiconductor Corporation HCPL3700 Rev. 1.0.3 (No derating required up to 70°C) Parameter Average Surge, 3ms, 120Hz Pulse Rate Transient, 10µs, 120Hz Pulse Rate (1) (2) (3) (4) Parameter Min ...

Page 3

... Logic LOW Supply Current CCL I Logic HIGH Supply Current CCH C Input Capacitance IN Note: 5. Logic LOW output level at pin 6 occurs when V Logic HIGH output level at pin 6 occurs when V ©2005 Fairchild Semiconductor Corporation HCPL3700 Rev. 1.0 0°C to 70°C Unless otherwise specified) A Test Conditions 4 TH+ CC ...

Page 4

... Device is considered a two terminal device: Pins and 4 are shorted together and Pins and 8 are shorted together. 10. The 2500 V /1 min. capability is validated by a 3.0 kV RMS 11. AC voltage is instantaneous voltage for V 12. All typicals 25° ©2005 Fairchild Semiconductor Corporation HCPL3700 Rev. 1.0 25° Unless otherwise specified Test Conditions ( 4. 30pF ...

Page 5

... T – TEMPERATURE ( C) A Fig. 5 Propagation Delay vs. Temperature PLH PHL 0 -60 -40 - – TEMPERATURE ( C) A ©2005 Fairchild Semiconductor Corporation HCPL3700 Rev. 1.0 (Pins 1,2 shorted together 45 pins 3,4 shorted together - Fig. 4 Current Threshold/Voltage Threshold 4.2 120 4.0 110 3.8 100 3 ...

Page 6

... Fig. 7 Logic High Supply Current vs. Temperature 1000 V = 18V OPEN 0mA IN 100 10 1 -60 -40 - – TEMPERATURE ( C) A ©2005 Fairchild Semiconductor Corporation HCPL3700 Rev. 1.0.3 (Continued) Fig. 8 External Threshold Characteristics V+/V- vs. Rx 300 250 200 150 100 100 (AC) V- (DC) V+ (AC) V+ (DC 120 160 ...

Page 7

... 1.0 s (10%– GND Pulse Gen ** pF, WHICH INCLUDES PROBE L AND STRAY WIRING CAPACITANCE Fig. 10. Test Circuit for Common Mode Transient Immunity and Typical Waveforms ©2005 Fairchild Semiconductor Corporation HCPL3700 Rev. 1.0.3 +5V 8 Input ( bypass Output Output Fig. 9. Switching Test Circuit + bypass Output ...

Page 8

... TYP 0.405 (10.30) Lead Coplanarity : 0.004 (0.10) MAX Note: All dimensions are in inches (millimeters) ©2005 Fairchild Semiconductor Corporation HCPL3700 Rev. 1.0.3 0.4" Lead Spacing 0.200 (5.08) 0.140 (3.55) 15 MAX 0.300 (7.62) TYP 0.022 (0.56) 0.016 (0.41) 8-Pin DIP – ...

Page 9

... SDV Marking Information Definitions ©2005 Fairchild Semiconductor Corporation HCPL3700 Rev. 1.0.3 Example Part Number HCPL3700 Shipped in Tubes HCPL3700S Surface Mount Lead Bend HCPL3700SD Surface Mount; Tape and Reel HCPL3700W 0.4" Lead Spacing HCPL3700V VDE0884 HCPL3700WV VDE0884; 0.4” Lead Spacing HCPL3700SV VDE0884 ...

Page 10

... User Direction of Feed Note: All dimensions are in inches (millimeters) Reflow Profile 300 250 200 150 100 50 0 ©2005 Fairchild Semiconductor Corporation HCPL3700 Rev. 1.0.3 12.0 0.1 4.0 0.1 0.05 4.0 0.1 10.30 0.20 225C peak Time above 183C, 60–150 sec Ramp up = 3C/sec 0 0 ...

Page 11

... Product Status Advance Information Formative / In Design Preliminary First Production No Identification Needed Full Production Obsolete Not In Production ©2005 Fairchild Semiconductor Corporation HCPL3700 Rev. 1.0.3 PDP SPM™ FPS™ F-PFS™ Power-SPM™ ® FRFET PowerTrench SM Programmable Active Droop™ Global Power Resource ® ...

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