A40MX04-PLG84 Actel, A40MX04-PLG84 Datasheet - Page 8

• Manufacturer Part Number: A40MX04-PLG84
• Description: FPGA - Field Programmable Gate Array 6K System Gates
• Manufacturer: Actel

Specifications of A40MX04-PLG84

• Processor Series: A40MX04
• Core: IP Core
• Number Of Macrocells: 547
• Maximum Operating Frequency: 250 MHz
• Number Of Programmable I/os: 69
• Delay Time: 5.6 ns
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 3 V
• Number Of Gates: 6000
• Package / Case: PLCC-84
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The 42MX devices contain three types of logic modules:
combinatorial (C-modules), sequential (S-modules) and
decode
combinatorial logic module. The S-module, shown in
Figure
function as the C-module while adding a sequential
element. The sequential element can be configured as
either a D-flip-flop or a transparent latch. The S-module
register can be bypassed so that it implements purely
combinatorial logic.
Figure 1-3 • 42MX S-Module Implementation
1 -2
40MX and 42MX FPGA Families
1-3, implements the same combinatorial logic
(D-modules).
Up to 7-Input Function Plus D-Type Flip-Flop with Clear
Up to 4-Input Function Plus Latch with Clear
D0
D1
D11
D00
D01
D10
Figure 1-2
S1
S
S0
Y
Y
GATE
D
illustrates
D
CLR
CLR
Q
Q
OUT
OUT
the
v6.1
Figure 1-2 • 42MX C-Module Implementation
Up to 8-Input Function (Same as C-Module)
Up to 7-Input Function Plus Latch
A0
B0
D11
D00
D01
D10
S1
A1
B1
D00
D01
D10
D11
S1
S0
Y
S0
GATE
D
Y
OUT
Q
D00
D01
D10
D11
OUT
S0
S1
Y