PC28F256P30BFA NUMONYX, PC28F256P30BFA Datasheet - Page 44

• Manufacturer Part Number: PC28F256P30BFA
• Description: IC FLASH 256MBIT 100NS 64EZBGA
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of PC28F256P30BFA

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 256M (16Mx16)
• Speed: 100ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 2 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TBGA
• Package: 64EZBGA
• Cell Type: NOR
• Density: 256 Mb
• Architecture: Sectored
• Block Organization: Asymmetrical
• Location Of Boot Block: Bottom
• Typical Operating Supply Voltage: 1.8 V
• Sector Size: 32KByte x 4|128KByte x 255
• Timing Type: Asynchronous|Synchronous
• Interface Type: Parallel|Serial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 898884; 898884; PC28F256P30BF 898884

Table 18: WAIT Functionality Table
11.2.5
11.2.6
Table 19: Burst Sequence Word Ordering (Sheet 1 of 2)
Datasheet
44
CE# = ‘1’, OE# = ‘X’ or CE# = ‘0’, OE# = ‘1’
CE# =’0’, OE# = ‘0’
Synchronous Array Reads
Synchronous Non-Array Reads
All Asynchronous Reads
All Writes
Notes:
1.
2.
(DEC)
Addr.
Start
14
15
0
1
2
3
4
5
6
7
0
Active: WAIT is asserted until data becomes valid, then desserts
When OE# = V
(RCR.3)
Burst
Wrap
0
0
0
0
0
0
0
0
0
0
1
WAIT Delay
The WAIT Delay (WD) bit controls the WAIT assertion-delay behavior during
synchronous burst reads. WAIT can be asserted either during or one data cycle before
valid data is output on DQ[15:0]. When WD is set, WAIT is deasserted one data cycle
before valid data (default). When WD is cleared, WAIT is deasserted during valid data.
Burst Sequence
The Burst Sequence (BS) bit selects linear-burst sequence (default). Only linear-burst
sequence is supported.
lengths, as well as the effect of the Burst Wrap (BW) setting.
IH
(BL[2:0] = 0b001)
during writes, WAIT = High-Z
4-Word Burst
Condition
0-1-2-3
1-2-3-0
2-3-0-1
3-0-1-2
0-1-2-3
Table 19
(BL[2:0] = 0b010)
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
0-1-2-3-4-5-6-7
8-Word Burst
Burst Addressing Sequence (DEC)
shows the synchronous burst sequence for all burst
High-Z
Active
Active
Active
Deasserted
High-Z
5-6-7-8-9…15-0-1-2-3-
4-5-6-7-8…15-0-1-2-3
6-7-8-9-10…15-0-1-2-
7-8-9-10…15-0-1-2-3-
(BL[2:0] = 0b011)
3-4-5-6-7…15-0-1-2
14-15-0-1-2…12-13
15-0-1-2-3…13-14
2-3-4-5-6…15-0-1
0-1-2-3-4…14-15
0-1-2-3-4…14-15
16-Word Burst
1-2-3-4-5…15-0
3-4-5
4-5-6
4
WAIT
Order Number: 320002-10
14-15-16-17-18-19-20-
15-16-17-18-19-20-21-
(BL[2:0] = 0b111)
7-8-9-10-11-12-13…
6-7-8-9-10-11-12-…
Continuous Burst
5-6-7-8-9-10-11…
4-5-6-7-8-9-10…
0-1-2-3-4-5-6-…
1-2-3-4-5-6-7-…
2-3-4-5-6-7-8-…
3-4-5-6-7-8-9-…
0-1-2-3-4-5-6-…
…
…
P30-65nm
Notes
Mar 2010
1,2
1
1
1
1
1