ISL8033AIRZ Intersil, ISL8033AIRZ Datasheet - Page 14

• Manufacturer Part Number: ISL8033AIRZ
• Description: IC REG SYNC BUCK DUAL 3A 24QFN
• Manufacturer: Intersil
• Type: Step-Down (Buck), PWM - Current Moder

Specifications of ISL8033AIRZ

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.8 V ~ 6 V
• Current - Output: 3A
• Frequency - Switching: 2.5MHz
• Voltage - Input: 2.85 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Typical Operating Performance ISL8033A
Unless otherwise noted, operating conditions are:
1.8V, I
Theory of Operation
The ISL8033 is a dual 3A step-down switching regulator optimized
for battery-powered or mobile applications. The regulator operates
at 1MHz fixed switching frequency under heavy load condition. The
ISL8033A operates at 2.5MHz to allow small external inductor and
capacitors to be used for minimal printed-circuit board (PCB) area.
The two channels are 180° out-of-phase operation. The supply
current is typically only 8µA when the regulator is shutdown.
PWM Control Scheme
Pulling the SYNC pin HI (>1.5V) forces the converter into PWM
mode in the next switching cycle regardless of output current.
Each of the channels of the ISL8033, ISL8033A employ the
current-mode pulse-width modulation (PWM) control scheme for
fast transient response and pulse-by-pulse current limiting, as
shown in the “Theory of Operation” on page 14. The current loop
consists of the oscillator, the PWM comparator COMP, current
sensing circuit, and the slope compensation for the current loop
stability. The current sensing circuit consists of the resistance of
the P-channel MOSFET when it is turned on and the current sense
amplifier CSA1. The gain for the current sensing circuit is
typically 0.20V/A. The control reference for the current loops
comes from the error amplifier EAMP of the voltage loop.
The PWM operation is initialized by the clock from the oscillator.
The P-channel MOSFET is turned on at the beginning of a PWM
cycle and the current in the MOSFET starts to ramp-up. When the
sum of the current amplifier CSA1 (or CSA2 on Channel 2) and the
compensation slope (0.46V/µs) reaches the control reference of
the current loop, the PWM comparator COMP sends a signal to the
PWM logic to turn off the P-MOSFET and to turn on the N-channel
MOSFET. The N-MOSFET stays on until the end of the PWM cycle.
Figure 40 shows the typical operating waveforms during the PWM
operation. The dotted lines illustrate the sum of the compensation
ramp and the current-sense amplifier CSA_ output.
OUT1
= I
OUT2
FIGURE 38. LOAD TRANSIENT CHANNEL 1
= 0A to 3A. (Continued)
V
14
OUT1
IL1 2A/DIV
RIPPLE 50mV/DIV
T
A
= +25°C, V
ISL8033, ISL8033A
IN
= 5V, EN = V
The output voltage is regulated by controlling the reference
voltage to the current loop. The bandgap circuit outputs a 0.8V
reference voltage to the voltage control loop. The feedback signal
comes from the VFB pin. The soft-start block only affects the
operation during the start-up and will be discussed separately.
The error amplifier is a transconductance amplifier that converts
the voltage error signal to a current output. The voltage loop is
internally compensated with the 27pF and 390kΩ RC network.
The maximum EAMP voltage output is precisely clamped to the
bandgap voltage (1.172V).
Synchronization Control (ISL8033)
The frequency of operation can be synchronized up to 6MHz by an
external signal applied to the SYNC pin. The 1st falling edge on the
SYNC triggered the rising edge of the PWM ON pulse of Channel 1. The
2nd falling edge of the SYNC triggers the rising edge of the PWM ON
pulse of the Channel 2. This process alternates indefinitely allowing
180° output phase operation between the two channels.
IN
Cycle
V
V
, L1 = 0.68µH, L2 = 1
Duty
V
EAMP
CSA1
OUT
I
L
FIGURE 40. PWM OPERATION WAVEFORMS
FIGURE 39. LOAD TRANSIENT CHANNEL 2
µ
H, C1 = C2 = C4 = 2x22µF, V
V
OUT2
IL2 2A/DIV
RIPPLE 50mV/DIV
OUT1
= 1.2V, V
March 24, 2011
FN6854.2
OUT2
=