ISL8088EVAL1Z Intersil, ISL8088EVAL1Z Datasheet - Page 14

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ISL8088EVAL1Z

Manufacturer Part Number
ISL8088EVAL1Z
Description
EVAL BOARD 1 FOR ISL8088
Manufacturer
Intersil
Datasheets

Specifications of ISL8088EVAL1Z

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Theory of Operation
The ISL8088 is a dual 800mA step-down switching
regulator optimized for battery-powered or mobile
applications. The regulator operates at 2.25MHz fixed
switching frequency under heavy load conditions to allow
small external inductor and capacitors to be used for
minimal printed-circuit board (PCB) area. At light load,
the regulator reduces the switching frequency, unless
forced to the fixed frequency, to minimize the switching
loss and to maximize the battery life. The two channels
are in-phase operation. The quiescent current when the
outputs are not loaded is typically only 30µA. The supply
current is typically only 6.5µA when the regulator is shut
down.
PWM Control Scheme
Pulling the SYNC pin LOW (<0.4V) forces the converter
into PWM mode in the next switching cycle regardless of
output current. Each of the channels of the ISL8088
employ the current-mode pulse-width modulation
(PWM) control scheme for fast transient response and
pulse-by-pulse current limiting shown in the “Block
Diagram” on page 13. The current loop consists of the
oscillator, the PWM comparator COMP, current sensing
circuit, and the slope compensation for the current loop
stability. The current sensing circuit consists of the
resistance of the P-Channel MOSFET when it is turned
on and the current sense amplifier CSA1 (or CSA2 on
Channel 2). The gain for the current sensing circuit is
typically 0.285V/A. The control reference for the current
loops comes from the error amplifier EAMP of the
voltage loop.
The PWM operation is initialized by the clock from the
oscillator. The P-Channel MOSFET is turned on at the
beginning of a PWM cycle and the current in the
MOSFET starts to ramp-up. When the sum of the
current amplifier CSA1 (or CSA2) and the compensation
slope (0.33V/µs) reaches the control reference of the
current loop, the PWM comparator COMP sends a signal
to the PWM logic to turn off the P-MOSFET and to turn
on the N-Channel MOSFET. The N-MOSFET stays on
until the end of the PWM cycle. Figure 42 shows the
typical operating waveforms during the PWM operation.
CLOCK
V
OUT
I
0
L
14
8 CYCLES
PWM
NOMINAL +1.5%
FIGURE 43. SKIP MODE OPERATION WAVEFORMS
ISL8088
NOMINAL
PFM CURRENT LIMIT
The dotted lines illustrate the sum of the compensation
ramp and the current-sense amplifier CSA-output.
The output voltage is regulated by controlling the
reference voltage to the current loop. The bandgap
circuit outputs a 0.6V reference voltage to the voltage
control loop. The feedback signal comes from the V
pin. The soft-start block only affects the operation during
the start-up and will be discussed separately shortly. The
error amplifier is a transconductance amplifier that
converts the voltage error signal to a current output. The
voltage loop is internally compensated with the 27pF and
200kΩ RC network. The maximum EAMP voltage output
is precisely clamped to 0.8V.
SKIP Mode
Pulling the SYNC pin HIGH (>2.0V) forces the converter
into PFM mode. The ISL8088 enters a pulse-skipping
mode at light load to minimize the switching loss by
reducing the switching frequency. Figure 43 illustrates
the skip-mode operation. A zero-cross sensing circuit
shown in the “Block Diagram” on page 13 monitors the
N-MOSFET current for zero crossing. When 8 consecutive
cycles of the N-MOSFET crossing zero are detected, the
regulator enters the skip mode. During the 8 detecting
cycles, the current in the inductor is allowed to become
negative. The counter is reset to zero when the current in
any cycle does not cross zero.
CYCLE
V
V
DUTY
V
EAMP
CSA
OUT
I
L
PFM
FIGURE 42. PWM OPERATION WAVEFORMS
LOAD CURRENT
April 29, 2010
FN6858.1
FB

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