MCB1114 Keil, MCB1114 Datasheet

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LPC1111/12/13/14 32-bit ARM Cortex-M0 microcontroller flash and 8 kB SRAM Rev. 00.11 — 13 November 2009 1. General description The LPC1111/12/13/14 are a ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for 8/16-bit microcontroller applications, offering ...

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NXP Semiconductors Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, and Deep power-down modes. Three reduced power modes: Sleep, Deep-sleep, and Deep power-down. Single 3.3 V power supply (1 3.6 V). 10-bit ADC with ...

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NXP Semiconductors Table 1. Ordering information …continued Type number Package Name LPC1114FHN33/201 HVQFN33 LPC1114FHN33/301 HVQFN33 LPC1113FBD48/301 LQFP48 LPC1114FBD48/301 LQFP48 LPC1114FA44/301 PLCC44 4.1 Ordering options Table 2. Ordering options Type number LPC1111 LPC1111FHN33/101 LPC1111FHN33/201 LPC1112 LPC1112FHN33/101 LPC1112FHN33/201 LPC1113 LPC1113FHN33/201 LPC1113FHN33/301 LPC1113FBD48/301 ...

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NXP Semiconductors 5. Block diagram LPC1111/12/13/14 system bus slave HIGH-SPEED GPIO ports GPIO PIO0/1/2/3 RXD TXD UART (1) DTR, DSR , CTS, (1) (1) DCD , RI , RTS CT32B0_MAT[3:0] 32-bit COUNTER/TIMER 0 CT32B0_CAP0 CT32B1_MAT[3:0] 32-bit COUNTER/TIMER 1 CT32B1_CAP0 CT16B0_MAT[2:0] ...

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NXP Semiconductors 6. Pinning information 6.1 Pinning 1 PIO2_6 PIO2_0/DTR/SSEL1 2 3 RESET/PIO0_0 PIO0_1/CLKOUT/CT32B0_MAT2 SSIO XTALIN 6 7 XTALOUT V 8 DD(IO) 9 PIO1_8/CT16B1_CAP0 PIO0_2/SSEL0/CT16B0_CAP0 10 11 PIO2_7 PIO2_8 12 Fig 2. Pin configuration LQFP48 package LPC1111_12_13_14_0 ...

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NXP Semiconductors RESET/PIO0_0 7 8 PIO0_1/CLKOUT/CT32B0_MAT2 V 9 SSIO 10 XTALIN XTALOUT DD(IO) PIO1_8/CT16B1_CAP0 13 14 PIO0_2/SSEL0/CT16B0_CAP0 PIO2_7 15 16 PIO2_8 PIO2_1/DSR/SCK1 17 Fig 3. Pin configuration PLCC44 package LPC1111_12_13_14_0 Objective data sheet LPC1111/12/13/14 39 TRST/PIO1_2/AD3/CT32B1_MAT1 38 ...

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NXP Semiconductors terminal 1 index area PIO2_0/DTR RESET/PIO0_0 PIO0_1/CLKOUT/CT32B0_MAT2 XTALIN XTALOUT V DD(IO) PIO1_8/CT16B1_CAP0 PIO0_2/SSEL0/CT16B0_CAP0 Fig 4. Pin configuration HVQFN 33 package LPC1111_12_13_14_0 Objective data sheet LPC1111/12/13/ TRST/PIO1_2/AD3/CT32B1_MAT1 2 23 TDO/PIO1_1/AD2/CT32B1_MAT0 3 22 TMS/PIO1_0/AD1/CT32B1_CAP0 4 21 TDI/PIO0_11/AD0/CT32B0_MAT3 5 ...

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NXP Semiconductors 6.2 Pin description Table 3. LPC1113/14 pin description table (LQFP48 package) Symbol Pin Type PIO0_0 to PIO0_11 I/O RESET/PIO0_0 3 I I/O [1] PIO0_1/CLKOUT/ 4 I/O CT32B0_MAT2 O O [1] I/O PIO0_2/SSEL0/ 10 CT16B0_CAP0 O I [1] PIO0_3 ...

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NXP Semiconductors Table 3. LPC1113/14 pin description table (LQFP48 package) Symbol Pin Type PIO1_0 to PIO1_11 I/O [3] TMS/PIO1_0 AD1/CT32B1_CAP0 I [3] TDO/PIO1_1 AD2/CT32B1_MAT0 I [3] TRST/PIO1_2 AD3/CT32B1_MAT1 I/O I ...

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NXP Semiconductors Table 3. LPC1113/14 pin description table (LQFP48 package) Symbol Pin Type PIO2_0 to PIO2_11 I/O [1] PIO2_0/DTR/SSEL1 2 I [1] PIO2_1/DSR/SCK1 13 I/O I I/O [1] PIO2_2/DCD/MISO1 26 I/O I I/O [1] PIO2_3/RI/MOSI1 38 I/O I ...

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NXP Semiconductors Table 3. LPC1113/14 pin description table (LQFP48 package) Symbol Pin Type [5] XTALIN 6 I [5] XTALOUT [ tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable ...

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NXP Semiconductors Table 4. LPC1114 pin description table (PLCC44 package) Symbol Pin Type [1] PIO0_9/MOSI0/ 32 I/O CT16B0_MAT1 I/O O [1] SWCLK/PIO0_10 SCK0/CT16B0_MAT2 I/O I/O O [3] TDI/PIO0_11 AD0/CT32B0_MAT3 I PIO1_0 to PIO1_11 I/O ...

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NXP Semiconductors Table 4. LPC1114 pin description table (PLCC44 package) Symbol Pin Type [1] PIO1_7/TXD/ 4 I/O CT32B0_MAT1 O O [1] PIO1_8/CT16B1_CAP0 13 I/O I [1] PIO1_9/CT16B1_MAT0 21 I/O O [3] PIO1_10/AD6/ 34 I/O CT16B1_MAT1 I O [3] PIO1_11/AD7 44 ...

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NXP Semiconductors Table 4. LPC1114 pin description table (PLCC44 package) Symbol Pin Type [ DD(IO) [ DD(3V3 SSIO [5] XTALIN 10 I [5] XTALOUT [1] ...

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NXP Semiconductors Table 5. LPC1111/12/13/14 pin description table (HVQFN33 package) Symbol Pin Type PIO0_0 to PIO0_11 I/O RESET/PIO0_0 2 I I/O [1] PIO0_1/CLKOUT/ 3 I/O CT32B0_MAT2 O O [1] PIO0_2/SSEL0/ 8 I/O CT16B0_CAP0 O I [1] PIO0_3 9 I/O [2] ...

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NXP Semiconductors Table 5. LPC1111/12/13/14 pin description table (HVQFN33 package) Symbol Pin Type [3] TMS/PIO1_0/AD1 CT32B1_CAP0 I [3] TDO/PIO1_1/AD2 CT32B1_MAT0 I [3] TRST/PIO1_2/AD3 CT32B1_MAT1 I [3] SWDIO/PIO1_3/AD4/ 25 ...

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NXP Semiconductors Table 5. LPC1111/12/13/14 pin description table (HVQFN33 package) Symbol Pin Type [1] PIO2_0/DTR 1 I/O O PIO3_0 to PIO3_5 I/O [1] PIO3_2 28 I/O [1] PIO3_4 13 I/O [1] PIO3_5 14 I/O [ DD(IO) [4] ...

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NXP Semiconductors 7. Functional description 7.1 ARM Cortex-M0 processor The ARM Cortex- general purpose, 32-bit microprocessor, which offers high performance and very low power consumption. 7.2 On-chip flash program memory The LPC1111/12/13/14 contain 32 kB (LPC1114 ...

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NXP Semiconductors LPC1111/12/13/ reserved AHB peripherals reserved APB peripherals 1 GB reserved 0.5 GB reserved 16 kB boot ROM reserved 8 kB SRAM (LPC1113/14/301 SRAM (LPC1111/12/13/14/201 SRAM (LPC1111/12/101) reserved 32 kB on-chip flash (LPC1114) ...

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NXP Semiconductors • In the LPC1111/12/13/14, the NVIC supports 32 vectored interrupts including inputs to the start logic from individual GPIO pins. • 8 programmable interrupt priority levels, with hardware priority level masking • Relocatable vector table. ...

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NXP Semiconductors 7.8 UART The LPC1111/12/13/14 contains one UART. Support for RS-485/9-bit mode allows both software address detection and automatic address detection using 9-bit mode. The UART includes a fractional baud rate generator. Standard baud rates such as 115200 Bd ...

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NXP Semiconductors capability to both receive and send information (such as memory). Transmitters and/or receivers can operate in either master or slave mode, depending on whether the chip has to initiate a data transfer or is only addressed. The I ...

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NXP Semiconductors 7.12.1 Features • A 32-bit/16-bit timer/counter with a programmable 32-bit/16-bit prescaler. • Counter or timer operation. • One capture channel per timer, that can take a snapshot of the timer value when an input signal transitions. A capture ...

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NXP Semiconductors 7.15 Clocking and power control 7.15.1 Crystal oscillators The LPC1111/12/13/14 include three independent oscillators. These are the system oscillator, the Internal RC oscillator (IRC), and the Watchdog oscillator. Each oscillator can be used for more than one purpose ...

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NXP Semiconductors 7.15.1.1 Internal RC oscillator The IRC may be used as the clock source for the WDT, and/or as the clock that drives the PLL and subsequently the CPU. The nominal IRC frequency is 12 MHz. The IRC is ...

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NXP Semiconductors 7.15.5.1 Sleep mode When Sleep mode is entered, the clock to the core is stopped. Resumption from the Sleep mode does not need any special sequence but re-enabling the clock to the ARM core. In Sleep mode, execution ...

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NXP Semiconductors 7.16.2 Brownout detection The LPC1111/12/13/14 includes four levels for monitoring the voltage on the V If this voltage falls below one of the four selected levels, the BOD asserts an interrupt signal to the NVIC. This signal can ...

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NXP Semiconductors 7.16.7 Memory mapping control The Cortex-M0 incorporates a mechanism that allows remapping the interrupt vector table to alternate locations in the memory map. This is controlled via the Vector Table Offset Register contained in the NVIC. The vector ...

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NXP Semiconductors 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (3.3 V) DD(3V3) V input/output supply voltage DD(IO) V input voltage I I supply current DD ...

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NXP Semiconductors 9. Static characteristics Table 7. Static characteristics − ° ° +85 C, unless otherwise specified. amb Symbol Parameter V supply voltage (3.3 V) DD(3V3) V input/output supply DD(IO) voltage I supply current DD ...

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NXP Semiconductors Table 7. Static characteristics …continued − ° ° +85 C, unless otherwise specified. amb Symbol Parameter I HIGH-level short-circuit OHS output current I LOW-level short-circuit OLS output current I pull-down current pd I ...

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NXP Semiconductors Table 7. Static characteristics …continued − ° ° +85 C, unless otherwise specified. amb Symbol Parameter I input leakage current LI Oscillator pins V crystal input voltage i(xtal) V crystal output voltage o(xtal) ...

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NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential ...

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NXP Semiconductors 9.1 BOD static characteristics Table 9. BOD static characteristics ° amb Symbol Parameter V threshold voltage th [1] Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see ...

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NXP Semiconductors Conditions: T but not configured to run. Fig 9. Supply current at different core voltages in active mode Conditions: active ...

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NXP Semiconductors 9.3 Electrical pin characteristics 2000 V IN (mV) 1000 500 0 0 Conditions Fig 11. I C-bus current ( OUT ( Conditions: V Fig 12. High drive output (I ...

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NXP Semiconductors Measured on pins Pn.m; V Fig 13. Typical LOW-level output ( Measured on pins Pn.m; V Fig 14. Typical HIGH-level ...

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NXP Semiconductors Measured on pins Pn.m; V Fig 15. Typical pull-up current ( Measured on pins Pn.m; V Fig 16. Typical pull-down ...

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NXP Semiconductors 10. Dynamic characteristics 10.1 Flash memory Table 10. Flash characteristics − ° ° +85 C, unless otherwise specified. amb Symbol Parameter N endurance endu t retention time ret [1] Number of program/erase cycles. ...

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NXP Semiconductors 10.3 Internal oscillators Table 12. Dynamic characteristic: internal oscillators − ° ° + over specified ranges. amb DD(3V3) Symbol Parameter f internal RC oscillator frequency osc(RC) [1] Parameters are valid over ...

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NXP Semiconductors 2 10.4 I C-bus Table 13. Dynamic characteristic: I − ° ° + amb DD(3V3) DD(IO) Symbol Parameter f SCL clock frequency SCL t fall time f t data ...

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NXP Semiconductors 10.5 SPI interfaces Table 14. Dynamic characteristics of SPI pins in SPI mode Symbol Parameter T PCLK cycle time cy(PCLK) T clock cycle time cy(clk) SPI master (in SPI mode) t data set-up time DS t data hold ...

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NXP Semiconductors SCK (CPOL = 0) SCK (CPOL = 1) MOSI MISO MOSI MISO Pin names SCK, MISO, and MOSI refer to pins for both SPI peripherals, SPI0 and SPI1. Fig 21. SPI master timing in SPI mode LPC1111_12_13_14_0 Objective ...

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NXP Semiconductors SCK (CPOL = 0) SCK (CPOL = 1) MOSI MISO MOSI MISO Pin names SCK, MISO, and MOSI refer to pins for both SPI peripherals, SPI0 and SPI1. Fig 22. SPI slave timing in SPI mode LPC1111_12_13_14_0 Objective ...

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NXP Semiconductors 11. Application information 11.1 XTAL input The input voltage to the on-chip oscillators is limited to 1 the oscillator is driven by a clock in slave mode recommended that the input be coupled through ...

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NXP Semiconductors Fig 24. Standard I/O pad configuration LPC1111_12_13_14_0 Objective data sheet LPC1111/12/13/14 V DD(IO enable output input R pd hysteresis control V SS Rev. 00.11 — 13 November 2009 PIN 002aae828 © NXP B.V. 2009. All rights ...

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NXP Semiconductors 12. Package outline LQFP48: plastic low profile quad flat package; 48 leads; body 1 pin 1 index DIMENSIONS (mm are ...

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NXP Semiconductors PLCC44: plastic leaded chip carrier; 44 leads pin 1 index 6 β DIMENSIONS (mm dimensions are derived from the original inch dimensions ...

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NXP Semiconductors HVQFN33: plastic thermal enhanced very thin quad flat package; no leads; 33 terminals; body 0.85 mm terminal 1 index area terminal 1 32 index area Dimensions (1) ...

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NXP Semiconductors 13. Abbreviations Table 15. Abbreviations Acronym ADC AHB AMBA APB BOD ETM GPIO PLL SPI SSI TTL UART LPC1111_12_13_14_0 Objective data sheet Description Analog-to-Digital Converter Advanced High-performance Bus Advanced Microcontroller Bus Architecture Advanced Peripheral Bus BrownOut Detection Embedded ...

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NXP Semiconductors 14. Revision history Table 16. Revision history Document ID Release date LPC1111_12_13_14_0.11 <tbd> • Modifications: Part LPC1114 added. • Parts LPC1111/101, LPC1112/101 added. • Flash and SRAM configuration changed (see LPC1111_12_13_0.09 <tbd> • Modifications: Part LPC1112 added. • ...

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NXP Semiconductors 15. Legal information 16. Data sheet status [1][2] [3] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating ...

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NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...