DSPIC30F2020-20E/SO Microchip Technology, DSPIC30F2020-20E/SO Datasheet - Page 14

• Manufacturer Part Number: DSPIC30F2020-20E/SO
• Description: IC, DSC, 16BIT, 12KB 40MHZ, 5.5V, SOIC28
• Manufacturer: Microchip Technology
• Series: DsPIC30Fr

Specifications of DSPIC30F2020-20E/SO

• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC30F1010/202X
31. Module: Output Compare Module
32. Module: PWM Duty Cycle
DS80290J-page 14
When the Output Compare Module is operated in
the Dual Compare Match mode, a timer compare
match with the value in the OCxR register sets the
OCx output producing a rising edge on the OCx
pin. Then, when a timer compare match with the
value in the OCxRS register occurs, the OCx
output is reset producing a falling edge on the OCx
pin.
The above statement applies to all conditions
except when the difference between OCxR and
OCxRS is ‘1’. In this case, the Output Compare
module may miss the reset compare event, and
cause the OCx pin to remain continuously high.
This condition will remain until the difference
between values in the OCxR and OCxRS registers
is made greater than ‘1’.
Work around
Ensure that the difference between values in
OCxR and OCxRS registers is maintained greater
than ‘1’ in the software.
The Power Supply PWM module has a feature to
enable immediate duty cycle updates. This feature
is enabled by setting IUE = 1 in the PWMCONx
register. The “dsPIC30F1010/202X Device Data
Sheet” (DS70178) states that the minimum PWM
duty cycle value is 0x0010. Duty cycle values less
than 0x0010 should cause the PWM outputs to
display states corresponding to a duty cycle value
of 0x0000.
When the immediate duty cycle updates are
enabled, and a value of 0x0010 or less is loaded
into the selected duty cycle register, the outputs of
the PWM generator (PWMxH and PWMxL) will
exhibit a state opposite to the expected state. For
example, if the expected state of the PWM output
is a continuous ‘0’, then a continuous ‘1’ will be
observed, and vice versa.
The above behavior applies when the Master Duty
Cycle (MDC register) or Individual Duty Cycle
(PDCx register) provides the duty cycle value.
Work around
If the immediate duty cycle updates are enabled,
do not load the duty cycle register with a value less
than or equal to 0x0010. If the immediate duty
cycle updates are not enabled, no action is
required because the correct PWM state will be
exhibited for all duty cycle values.
33. Module: PWM Jitter
TABLE 4:
EQUATION 2:
EQUATION 3:
Speed of Operation
The outputs of the PWM module may exhibit a
jitter proportional to the speed of operation of the
device. The jitter may be observed as a deviation
in the PWM Period, Duty Cycle or Phase, and may
be affected independent of each other. As a result,
the maximum deviation exhibited on the PWM
output pin at 30 MIPS is 8.4 nsec.
The jitter is caused by silicon process variations,
noise on the V
temperature of the dsPIC DSC. However, for a
given set of operating conditions, the maximum
jitter will be the same for all three parameters, and
independent of each other.
Table 4 shows the maximum jitter that may be
exhibited at various operating speeds.
The maximum jitter at any operating speed can be
determined using Equation 2.
Where:
• S is the speed of operation in MIPS.
The maximum percentage error observed on the
PWM output can be calculated using Equation 3.
Where:
• x
• x
Work around
Operate the Power Supply PWM module so that
the percentage error in the parameter of interest
(from Equation 3) is within permissible limits of the
application.
Error (%)
Maximum jitter observed (nsec)
interest (PWM period, Duty Cycle or Phase).
parameter of interest (PWM period, Duty Cycle
or Phase).
observed
programmed
30 MIPS
20 MIPS
15 MIPS
is the observed value of parameter of
=
±
is the programmed value of
(
------------------------------------------------------------
x
programmed
DD
© 2008 Microchip Technology Inc.
x
programmed
rail, and the operating
Maximum Jitter on
–
PWM Output
x
observed
12.6 nsec
16.8 nsec
8.4 nsec
=
252
-------- -
S ( )
)
⋅
100