XC3S1600E-4FGG484C Xilinx Inc, XC3S1600E-4FGG484C Datasheet - Page 106

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XC3S1600E-4FGG484C

Manufacturer Part Number
XC3S1600E-4FGG484C
Description
FPGA, SPARTAN-3E, 1600K GATES, 484FBGA
Manufacturer
Xilinx Inc
Series
Spartan-3Er
Datasheet

Specifications of XC3S1600E-4FGG484C

No. Of Logic Blocks
4408
No. Of Gates
1600000
No. Of Macrocells
33192
Family Type
Spartan-3E
No. Of Speed Grades
4
No. Of I/o's
376
Clock
RoHS Compliant
Total Ram Bits
700416

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Functional Description
106
instruction
JPROG
Load
Figure 68: Boundary-Scan Configuration Flow Diagram
No
Yes
and V
(JTAG port becomes
Load configuration
and V
INIT_B = High?
Load JSTART
(Clock five 1's
Load CFG_IN
Reconfigure?
Synchronous
configuration
data frames
User mode
V
instruction
Power-On
Yes
instruction
TAP reset
sequence
CCO
Yes
mode pins
Yes
available)
on TMS)
Start-Up
correct?
CCINT
memory
Sample
CCAUX
CRC
Clear
Bank 2 > 1V
www.xilinx.com
>1V
> 2V
No
No
No
INIT_B goes Low.
Abort Start-Up
Yes
Set PROG_B Low
after Power-On
PROG_B = Low
DS312-2_59_051706
No
DS312-2 (v3.8) August 26, 2009
Product Specification
R

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