XC2C384-10TQG144C Xilinx Inc, XC2C384-10TQG144C Datasheet - Page 24

IC, CPLD, 384 MACROCELL, 7.1NS, TQFP-144

XC2C384-10TQG144C

Manufacturer Part Number
XC2C384-10TQG144C
Description
IC, CPLD, 384 MACROCELL, 7.1NS, TQFP-144
Manufacturer
Xilinx Inc
Series
CoolRunner IIr
Datasheets

Specifications of XC2C384-10TQG144C

No. Of Macrocells
384
No. Of I/o's
118
Propagation Delay
7.1ns
Global Clock Setup Time
3.3ns
Frequency
125MHz
Supply Voltage Range
1.7V To 1.9V
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
9.2ns
Voltage Supply - Internal
1.7 V ~ 1.9 V
Number Of Logic Elements/blocks
24
Number Of Macrocells
384
Number Of Gates
9000
Number Of I /o
118
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-TQFP, 144-VQFP
Features
JTAG
Voltage
1.8V
Memory Type
CMOS
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1406

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0
XC2C384 CoolRunner-II CPLD
Warranty Disclaimer
THESE PRODUCTS ARE SUBJECT TO THE TERMS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED
AT http://www.xilinx.com/warranty.htm. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF THE
PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE
THEN-CURRENT XILINX DATA SHEET FOR THE PRODUCTS. PRODUCTS ARE NOT DESIGNED TO BE FAIL-SAFE
AND ARE NOT WARRANTED FOR USE IN APPLICATIONS THAT POSE A RISK OF PHYSICAL HARM OR LOSS OF
LIFE. USE OF PRODUCTS IN SUCH APPLICATIONS IS FULLY AT THE RISK OF CUSTOMER SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Additional Information
Additional information is available for the following CoolRunner-II topics:
Revision History
The following table shows the revision history for this document.
24
10/01/04
01/30/05
03/07/05
03/20/06
5/31/02
9/23/02
4/16/03
5/30/03
1/26/04
8/03/04
2/06/06
11/7/03
XAPP784: Bulletproof CPLD Design Practices
XAPP375: Timing Model
XAPP376: Logic Engine
XAPP378: Advanced Features
XAPP382: I/O Characteristics
XAPP389: Powering CoolRunner-II
XAPP399: Assigning VREF Pins
5/7/04
Date
Version
1.0
1.1
1.2
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
Initial Xilinx release
Updated FT256 and TQ144 pinouts
Updated FG324 package, updated No Connect pins
Added -6, -10 characterization data
Corrected typo on page 1. 324-ball FG BGA package has ball pitch of 1.0mm
Added links to Application notes and Data sheets
Corrected error in package dimensions of XC2C384-10TQ144I
Pb-free documentation
Add Asynchronous Preset/Reset Pulse Width specification to AC Electrical Characteristics
Change to I
Deleted -6 speed grade. Modifications to Table 1, IOSTANDARDs
Change to T
Add Warranty Disclaimer. Add note to Pin Descriptions that
be used for general purpose I/O
CCSB
SUI
for -7 speed grade. Previous value was typographical error
MAX for Industrial devices
www.xilinx.com
To access these and all application notes with their associ-
ated reference designs, click the following link and scroll
down the page until you find the document you want:
CoolRunner-II Data Sheets and Application Notes
Device Packages
Revision
GCK, GSR, and GTS pins can also
DS095 (v3.2) March 8, 2007
Product Specification
R

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