SST39LF200A-55-4C-EKE SILICON STORAGE TECHNOLOGY, SST39LF200A-55-4C-EKE Datasheet - Page 17

• Manufacturer Part Number: SST39LF200A-55-4C-EKE
• Description: MEMORY, FLASH, 2MBIT, PARL, 48TSOP
• Manufacturer: SILICON STORAGE TECHNOLOGY

Specifications of SST39LF200A-55-4C-EKE

• Memory Size: 2Mbit
• Supply Voltage Range: 3V To 3.6V
• Memory Case Style: TSOP
• No. Of Pins: 48
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Access Time: 55ns
• Interface: X16
• Memory Type: Flash - NOR
• Memory Configuration: 128K X 16
• Interface Type: CFI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash
SST39LF200A / SST39LF400A / SST39LF800A
SST39VF200A / SST39VF400A / SST39VF800A
©2010 Silicon Storage Technology, Inc.
ADDRESS A
ADDRESS A
FIGURE 9: Toggle Bit Timing Diagram
FIGURE 10: WE# Controlled Chip-Erase Timing Diagram
DQ
WE#
MS-0
OE#
CE#
WE#
15-0
OE#
DQ
MS-0
CE#
Note:
6
Note: This device also supports CE# controlled Chip-Erase operation. The WE# and CE# signals are
A
A
MS
MS
5555
interchageable as long as minimum timings are met. (See Table 16)
A MS = Most significant address
= Most significant address
= A
A MS = A 16 for SST39LF/VF200A, A 17 for SST39LF/VF400A and A 18 for SST39LF/VF800A
X can be V IL or V IH , but no other value.
XXAA
T
SW0
WP
16
for SST39LF/VF200A, A
2AAA
T
OEH
XX55
SW1
SIX-BYTE CODE FOR CHIP-ERASE
T
T
CE
OE
5555
XX80
SW2
17
5555
for SST39LF/VF400A and A
XXAA
SW3
17
2AAA
XX55
SW4
5555
XX10
SW5
18
WITH SAME OUTPUTS
TWO READ CYCLES
for SST39LF/VF800A
T
SCE
T OES
S71117-13-000
1117 F07.3
1117 F08.7
Data Sheet
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