PIC32MX795F512L-80I/BG Microchip Technology, PIC32MX795F512L-80I/BG Datasheet - Page 48

• Manufacturer Part Number: PIC32MX795F512L-80I/BG
• Description: IC, 32BIT MCU, PIC32, 80MHZ, BGA-100
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX795F512L-80I/BG

• Controller Family/series: PIC32
• Ram Memory Size: 128KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Interface: CAN, I2C, SPI, UART, USB
• No. Of Pwm Channels: 5
• Core Size: 32 Bit
• Program Memory Size: 512 KB
• Core Processor: MIPS32® M4K™
• Speed: 80MHz
• Connectivity: CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-TFBGA
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: PIC32MX7xx
• Core: MIPS
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC32MX
REGISTER 18-3:
DS61145G-page 48
bit 31
bit 23
bit 15
bit 7
Legend:
R = readable bit
U = unimplemented bit, read as ‘0’
bit 31-19
bit 18-16
bit 15
bit 14-11
bit 10-8
bit 7
UPLLEN
R/P-1
r-1
r-1
r-1
—
—
—
Reserved: Maintain as ‘1’
FPLLODIV<2:0>: Default Postscaler for PLL bits
111 = PLL output divided by 256
110 = PLL output divided by 64
101 = PLL output divided by 32
100 = PLL output divided by 16
011 = PLL output divided by 8
010 = PLL output divided by 4
001 = PLL output divided by 2
000 = PLL output divided by 1
UPLLEN: USB PLL Enable bit
1 = Enable USB PLL
0 = Disable and bypass USB PLL
Reserved: Maintain as ‘1’
UPLLIDIV<2:0>: PLL Input Divider bits
111 = 12x divider
110 = 10x divider
101 = 6x divider
100 = 5x divider
011 = 4x divider
010 = 3x divider
001 = 2x divider
000 = 1x divider
Reserved: Maintain as ‘1’
R/P-1
r-1
r-1
r-1
—
—
—
DEVCFG2: DEVICE CONFIGURATION WORD 2
FPLLMULT<2:0>
W = writable bit
R/P-1
r-1
r-1
r-1
—
—
—
R/P-1
r-1
r-1
r-1
—
—
—
P = programmable bit
-n = bit value at POR: (‘0’, ‘1’, x = unknown)
r-1
r-1
r-1
r-1
—
—
—
—
R/P-1
R/P-1
R/P-1
r-1
—
© 2010 Microchip Technology Inc.
FPLLODIV<2:0>
UPLLIDIV<2:0>
FPLLIDIV<2:0>
r = reserved bit
R/P-1
R/P-1
R/P-1
r-1
—
R/P-1
R/P-1
R/P-1
r-1
—
bit 24
bit 16
bit 8
bit 0