COP8SAC728M8 National Semiconductor, COP8SAC728M8 Datasheet - Page 43

• Manufacturer Part Number: COP8SAC728M8
• Description: 4K HIGHLY INTEGRATED OTP
• Manufacturer: National Semiconductor

Specifications of COP8SAC728M8

• Rohs Compliant: NO

13.0 Instruction Set
13.4.9 No-Operation Instruction
The no-operation instruction does nothing, except to occupy
space in the program memory and time in execution.
Note: The VIS is a special case of the Indirect Transfer of Control addressing
13.5 REGISTER AND SYMBOL DEFINITION
The following abbreviations represent the nomenclature
used in the instruction description and the COP8
cross-assembler.
A
B
X
SP
PC
PU
PL
C
HC
GIE
VU
VL
[B]
[X]
MD
Mem
Meml
Imm
Reg
Bit
No-Operation (NOP)
mode, where the double byte vector associated with the interrupt is
transferred from adjacent addresses in the program memory into the
program counter (PC) in order to jump to the associated interrupt
service routine.
8-Bit Accumulator Register
8-Bit Address Register
8-Bit Address Register
8-Bit Stack Pointer Register
15-Bit Program Counter Register
Upper 7 Bits of PC
Lower 8 Bits of PC
1 Bit of PSW Register for Carry
1 Bit of PSW Register for Half Carry
1 Bit of PSW Register for Global Interrupt
Enable
Interrupt Vector Upper Byte
Interrupt Vector Lower Byte
Memory Indirectly Addressed by B Register
Memory Indirectly Addressed by X Register
Direct Addressed Memory
Direct Addressed Memory or [B]
Direct Addressed Memory or [B] or
Immediate Data
8-Bit Immediate Data
Register Memory: Addresses F0 to FF
(Includes B, X and SP)
Bit Number (0 to 7)
Loaded with
Exchanged with
Registers
Symbols
(Continued)
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