DSPIC30F3013-20I/ML Microchip Technology, DSPIC30F3013-20I/ML Datasheet - Page 4

IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC

DSPIC30F3013-20I/ML

Manufacturer Part Number
DSPIC30F3013-20I/ML
Description
IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3013-20I/ML

Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Package
44QFN EP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
30
Interface Type
I2C/SPI/UART
On-chip Adc
10-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F301320IML
dsPIC30F3012/3013
3. Module: PSV Operations Using SR
TABLE 1:
EXAMPLE 2:
DS80255F-page 4
ADDC
SUBB
SUBBR
CPB
RLC
RRC
ADD (Accumulator-based)
LAC
Note 1:
.include “p30fxxxx.inc”
.......
MOV.B #0x00, W0
MOV.B WREG, PSVPAG
BSET
....
MOV
ADD
ADDC
When one of the operands of instructions shown in
Table 1 is fetched from program memory using
Program Space Visibility (PSV), the STATUS
Register, SR and/or the results may be corrupted.
Work around
Work around 1: For Assembly Language
Source Code
To work around the erratum in the MPLAB ASM30
assembler, the application may perform a PSV
access to move the source operand from program
memory to RAM or a W register before performing
the operations listed in Table 1. Example 3
demonstrates the work around for Example 2.
2:
3:
4:
CORCON, #PSV
#0x8200, W1
W3, [W1++], W5 ;This instruction
W4, [W1++], W6 ;Carry flag and
Refer to the Programmer’s Reference Manual for details on the dsPIC30F instruction set.
The errata only affects these instructions when a PSV access is performed to fetch one of the source
operands in the instruction. A PSV access is performed when the Effective Address of the source operand
is greater than 0x8000 and the PSV (CORCON<2>) bit is set to ‘1’. In the examples shown, the data
access from program memory is obtained via the W1 register.
SR<1:0> bits represent Sticky Zero and Carry Status bits, respectively.
SR<15:10> bits represent Accumulator Overflow and Saturation Status bits.
Instruction
AFFECTED INSTRUCTIONS
INCORRECT RESULTS
(1)
;Load PSVPAG register
;Enable PSV
;Set up W1 for
;indirect PSV access
;from 0x000200
;works ok
;W6 gets
;corrupted here!
ADDC
SUBB.b W0, [++W1], W3 ;
SUBBR.b W0, [++W1], W3 ;
CPB
RLC
RRC
ADD
LAC
Examples of Incorrect Operation
[W1], W4 ;
[W1], W2 ;
[W1++], A ;
[W1], A ;
W0, [W1++], W2 ;
W0, [W1++], W4 ;
EXAMPLE 3:
.include “p30fxxxx.inc”
.......
MOV.B #0x00, w0
MOV.B WREG, PSVPAG
BSET
....
MOV
ADD
MOV
ADDC
These instructions are identified in Table 1.
Example 2 demonstrates one scenario in which
this occurs.
Also, always use Work around 2 if the C compiler
is used to generate code for dsPIC30F3012/3013
devices.
Work around 2: For C Language Source Code
For applications using C language, MPLAB C30
versions 1.20.04 or higher provide the following
command-line switch that implements a work
around for the erratum.
-merrata=psv
Refer to the “readme.txt” file in the MPLAB C30
v1.20.04 toolsuite for further details.
CORCON, #PSV
#0x8200, W1
W3, [W1++], W5 ;This instruction
[W1++], W2
W4, W2, W6
(2)
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<15:10> bits
CORRECT RESULTS
© 2008 Microchip Technology Inc.
Data Corruption IN
;Load PSVPAG register
;Enable PSV
;Set up W1 for
;indirect PSV access
;from 0x000200
;works ok
;Load W2 with data
;from program memory
;Carry flag and W4
;results are ok!
(3)
(3)
(3)
(3)
(3)
(3)
(3)
, Result in W2
, Result in W3
, Result in W3
, Result in W4
, Result in W2
(4)

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