LM63CIMAX National Semiconductor, LM63CIMAX Datasheet - Page 17

no-image

LM63CIMAX

Manufacturer Part Number
LM63CIMAX
Description
IC,Motor Controller,MOS,SOP,8PIN
Manufacturer
National Semiconductor
Datasheet

Specifications of LM63CIMAX

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM63CIMAX
Manufacturer:
RENESAS
Quantity:
5 220
Part Number:
LM63CIMAX
Manufacturer:
NSC
Quantity:
8 000
Part Number:
LM63CIMAX
Manufacturer:
NS/国半
Quantity:
20 000
Company:
Part Number:
LM63CIMAX
Quantity:
2 000
Company:
Part Number:
LM63CIMAX
Quantity:
2 500
Part Number:
LM63CIMAX-NOPB
Manufacturer:
NS/国半
Quantity:
20 000
Company:
Part Number:
LM63CIMAX/NOPB
Quantity:
25 000
Address
4B
4D
4C
2.0 LM63 Registers
Fan Control Registers
Hex
HEX
HEX
HEX
4B
4D
4C
FAN PWM AND TACHOMETER CONFIGURATION REGISTER
FAN PWM FREQUENCY REGISTER
PWM VALUE REGISTER
5 = 1.)
Read/
(Write
only if
4A bit
Write
Read
R/W
R/W
reg
Bits
7:6
4:3
2:0
7:5
4:0
7:6
5:0
5
000000
10111
Value
POR
111
000
11
00
0
1
(Continued)
(Continued)
Tachometer
Duty Cycle
Frequency
Spin-Up
Spin-Up
Spin-Up
Name
Value
PWM
PWM
PWM
PWM
Time
Fast
These bits are unused and always set to 0
If 0, the fan spin-up uses the duty cycle and spin-up time, bits 0–4.
If 1, the LM63 sets the PWM output to 100% until the spin-up times out
(per bits 0–2) or the minimum desired RPM has been reached (per the
Tachometer Setpoint setting) using the tachometer input, whichever
happens first. This bit overrides the PWM Spin-Up Duty Cycle register
(bits 4:3) — PWM output is always 100%. Register x03, bit 2 = 1 for
Tachometer mode.
If PWM Spin-Up Time (bits 2:0) = 000, the Spin-Up cycle is bypassed,
regardless of the state of this bit.
00: Spin-Up cycle bypassed (no Spin-Up), unless Fast Tachometer
Terminated Spin-Up (bit 5) is set.
01: 50%
10: 75%–81% Depends on PWM Frequency. See Applications Notes.
11: 100%
000: Spin-Up cycle bypassed (No Spin-Up)
001: 0.05 seconds
010: 0.1 s
011: 0.2 s
100: 0.4 s
101: 0.8 s
110: 1.6 s
111: 3.2 s
These bits are unused and always set to 0
The PWM Frequency = PWM_Clock / 2n, where PWM_Clock = 360
kHz or 1.4 kHz (per the PWM Clock Select bit in Register 4A), and n =
value of the register. Note: n = 0 is mapped to n = 1. See the
Application Note at the end of this datasheet.
These bits are unused and always set to 0
If PWM Program (register 4A, bit 5) = 0 this register is read only and
reflects the LM63’s current PWM value from the Lookup Table.
If PWM Program (register 4A, bit 5) = 1, this register is read/write and
the desired PWM value is written directly to this register, instead of
from the Lookup Table, for direct fan speed control.
This register will read 0 during the Spin-Up cycle.
See Application Notes section at the end of this datasheet for more
information regarding the PWM Value and Duty Cycle in %.
17
Description
www.national.com

Related parts for LM63CIMAX