LMC6081AIM National Semiconductor, LMC6081AIM Datasheet - Page 7

• Manufacturer Part Number: LMC6081AIM
• Description: Operational Amplifier (Op-Amp) IC
• Manufacturer: National Semiconductor

Specifications of LMC6081AIM

• No. Of Amplifiers: 1
• Slew Rate: 1.5V/µs
• No. Of Pins: 8
• Peak Reflow Compatible (260 C): No
• Leaded Process Compatible: No
• Mounting Type: Surface Mount
• Package / Case: 8-NSOIC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Applications Hints
Although the LMC6081 is highly stable over a wide range of
operating conditions, certain precautions must be met to
achieve the desired pulse response when a large feedback
resistor is used. Large feedback resistors and even small
values of input capacitance, due to transducers, photo-
diodes, and circuit board parasitics, reduce phase margins.
When high input impedances are demanded, guarding of the
LMC6081 is suggested. Guarding input lines will not only re-
duce leakage, but lowers stray input capacitance as well.
(See Printed-Circuit-Board Layout for High Impedance
Work).
The effect of input capacitance can be compensated for by
adding a capacitor, C
Figure 1 ) such that:
or
Since it is often difficult to know the exact value of C
be experimentally adjusted so that the desired pulse re-
sponse is achieved. Refer to the LMC660 and LMC662 for a
more detailed discussion on compensating for input
capacitance.
CAPACITIVE LOAD TOLERANCE
All rail-to-rail output swing operational amplifiers have volt-
age gain in the output stage. A compensation capacitor is
normally included in this integrator stage. The frequency lo-
cation of the dominant pole is affected by the resistive load
on the amplifier. Capacitive load driving capability can be op-
timized by using an appropriate resistive load in parallel with
the capacitive load (see typical curves).
Direct capacitive loading will reduce the phase margin of
many op-amps. A pole in the feedback loop is created by the
combination of the op-amp’s output impedance and the ca-
pacitive load. This pole induces phase lag at the unity-gain
crossover frequency of the amplifier resulting in either an os-
cillatory or underdamped pulse response. With a few exter-
nal components, op amps can easily indirectly drive capaci-
tive loads, as shown in Figure 2 .
FIGURE 1. Cancelling the Effect of Input Capacitance
f
, around the feedback resistors (as in
R
1
C
IN
R
(Continued)
2
C
f
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IN
, C
f
can
7
In the circuit of Figure 2 , R1 and C1 serve to counteract the
loss of phase margin by feeding the high frequency compo-
nent of the output signal back to the amplifier’s inverting in-
put, thereby preserving phase margin in the overall feedback
loop.
Capacitive load driving capability is enhanced by using a pull
up resistor to V
ducting 500 µA or more will significantly improve capacitive
load responses. The value of the pull up resistor must be de-
termined based on the current sinking capability of the ampli-
fier with respect to the desired output swing. Open loop gain
of the amplifier can also be affected by the pull up resistor
(see electrical characteristics).
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC6081, typically less
than 10 fA, it is essential to have an excellent layout. Fortu-
nately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6081’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs, as in Fig-
FIGURE 2. LMC6081 Noninverting Gain of 10 Amplifier,
Compensated to Handle Capacitive Loads
Capacitive Loads with a Pull Up Resistor
FIGURE 3. Compensating for Large
+
( Figure 3 ). Typically a pull up resistor con-
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