PIC16C505-20/P Microchip Technology, PIC16C505-20/P Datasheet - Page 15

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PIC16C505-20/P

Manufacturer Part Number
PIC16C505-20/P
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,14PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets

Specifications of PIC16C505-20/P

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
11
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
OTP
Ram Size
72 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
14-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1086 - ADAPTER 14-ZIF BD W/14-SO PLUGS309-1085 - ADAPTER 14-DIP BD W/2 14-SO PLUGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.4
The OPTION register is a 8-bit wide, write-only
register, which contains various control bits to
configure the Timer0/WDT prescaler and Timer0.
By executing the OPTION instruction, the contents of
the W register will be transferred to the OPTION
register. A RESET sets the OPTION<7:0> bits.
REGISTER 4-2:
bit7
1999 Microchip Technology Inc.
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2-0:
RBWU
W-1
OPTION Register
RBWU: Enable wake-up on pin change (RB0, RB1, RB3, RB4)
1 = Disabled
0 = Enabled
RBPU: Enable weak pull-ups (RB0, RB1, RB3, RB4)
1 = Disabled
0 = Enabled
T0CS: Timer0 clock source select bit
1 = Transition on T0CKI pin (overrides TRIS <RC57>
0 = Transition on internal instruction cycle clock, Fosc/4
T0SE: Timer0 source edge select bit
1 = Increment on high to low transition on the T0CKI pin
0 = Increment on low to high transition on the T0CKI pin
PSA: Prescaler assignment bit
1 = Prescaler assigned to the WDT
0 = Prescaler assigned to Timer0
PS<2:0>: Prescaler rate select bits
Bit Value
RBPU
W-1
000
001
010
011
100
101
110
111
6
OPTION REGISTER
T0CS
Timer0 Rate WDT Rate
W-1
5
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
T0SE
W-1
4
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
PSA
W-1
3
W-1
PS2
2
Note:
PS1
W-1
1
If TRIS bit is set to ‘0’, the wake-up on
change and pull-up functions are disabled
for that pin (i.e., note that TRIS overrides
OPTION control of RBPU and RBWU).
PS0
W-1
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
PIC16C505
read as ‘0’
DS40192C-page 15

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