PIC18F4455-I/ML Microchip Technology, PIC18F4455-I/ML Datasheet - Page 6

• Manufacturer Part Number: PIC18F4455-I/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,44PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4455-I/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 24KB (12K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, I2C, EAUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNI3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRD444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Details

PIC18F2455/2550/4455/4550
EXAMPLE 2:
DS80478A-page 6
C Programming Language
The exact work around depends on the compiler in
use. Please refer to your C compiler documentation
for details.
If using the Microchip MPLAB
define both high and low-priority interrupt handler
functions
pragma interruptlow
directive instructs the compiler to not use the
An optimized, C18 version of the code is pro-
vided in Example 3. This example illustrates how
to reduce the instruction cycle count from
10 cycles to 3.
Affected Silicon Revisions
#pragma interruptlow MyLowISR
void MyLowISR(void)
{
}
// Although MyHighISR is a high priority interrupt, use interruptlow pragma so that
// the compiler will not use retfie FAST.
#pragma interruptlow MyHighISR
void MyHighISR(void)
{
}
#pragma code highVector=0x08
void HighVector (void)
{
}
#pragma code /* return to default code section */
#pragma code lowVector=0x18
void LowVector (void)
{
}
#pragma code /* return to default code section */
A3
X
// Handle low priority interrupts.
// Handle high priority interrupts.
_asm goto MyHighISR _endasm
_asm goto MyLowISR _endasm
as
B4
INTERRUPT WORK AROUND – C
“low
priority”
B5
®
directive.
C18 C Compiler,
by
B6
using
B7
This
the
EXAMPLE 3:
#pragma code high_vector_section=0x8
void high_vector (void)
{
}
void high_vector_branch (void)
{
}
#pragma interrupt high_isr
void high_isr (void)
{
}
_asm
_endasm
_asm
_endasm
...
RETFIE FAST instruction. If the proper high-
priority interrupt bit is set in the IPRx register, the
interrupt is treated as high priority in spite of the
pragma interruptlow directive.
The
demonstrates the work around using the C18
compiler.
CALL high_vector_branch, 1
POP
GOTO high_isr
code segment shown
INTERRUPT WORK
AROUND – OPTIMIZED C18
© 2009 Microchip Technology Inc.
in
Example 2