PIC18F8720-E/PT Microchip Technology, PIC18F8720-E/PT Datasheet - Page 22
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PIC18F8720-E/PT
Manufacturer Part Number
PIC18F8720-E/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F8520T-IPT.pdf
(380 pages)
3.PIC18F8520T-IPT.pdf
(40 pages)
4.PIC18F6620-IPT.pdf
(14 pages)
5.PIC18F6620-IPT.pdf
(12 pages)
Specifications of PIC18F8720-E/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
68
Number Of Timers
2 x 8 bit
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183032, DM183022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8720-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18FXX20
4.3
A configuration address may be read and output on
SDATA via the 4-bit command, ‘1001’. Configuration
data is read and written in a byte-wise fashion, so it is
not necessary to merge two bytes into a word prior to a
compare. The result may then be immediately
compared to the appropriate configuration data in the
programmer’s memory for verification. Refer to
Section 4.1 for implementation details of reading
configuration data.
4.4
Data EEPROM is accessed one byte at a time via an
Address Pointer (register pair EEADR:EEADRH) and a
data latch (EEDATA). Data EEPROM is read by loading
EEADR:EEADRH with the desired memory location
and initiating a memory read by appropriately
configuring the EECON1 register. The data will be
loaded into EEDATA, where it may be serially output on
SDATA via the 4-bit command, ‘0010’ (Shift Out Data
Holding register). A delay of P6 must be introduced
after the falling edge of the 8th SCLK of the operand to
allow SDATA to transition from an input to an output.
During this time, SCLK must be held low (see
Figure 4-4).
The command sequence to read a single byte of data
is shown in Figure 4-2.
DS39583C-page 22
Verify Configuration Bits
Read Data EEPROM Memory
FIGURE 4-3:
No
Move to TABLAT
READ DATA EEPROM
FLOW
Shift Out Data
2010 Microchip Technology Inc.
Address
Read
Done
Byte
Start
Done
Set
?
Yes