ISL29020IROZ-T7A Intersil, ISL29020IROZ-T7A Datasheet - Page 5

IC SENSOR LIGHT-DGTL I2C 6ODFN

ISL29020IROZ-T7A

Manufacturer Part Number
ISL29020IROZ-T7A
Description
IC SENSOR LIGHT-DGTL I2C 6ODFN
Manufacturer
Intersil
Datasheet

Specifications of ISL29020IROZ-T7A

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Register Set
There are three 8-bit registers in the ISL29020. Table 1 summarizes their functions.
Command Register (00 hex)
The Read/Write command register has five functions:
b1xxx_xxxx
1. Enable: Bit 7. This bit enables the ISL29020 with logic 1
2. Measurement Mode: Bit 6. This bit controls the two
3. Light Sensing: Bit 5. This bit programs the device to do the
ADDRESS
ADDR
00h
01h
02h
and powers down ISL29020 with logic 0.
measurement modes of the device. A logic 0 puts the
device in the one-time measurement mode in which the
device is automatically shut-down after each
measurement. A logic 1 puts the device in the continuous
measurement mode in which data is collected
continuously.
ambient light or the infrared (IR) light sensing. A logic 0,
requests for the ambient light sensing and a logic 1
requests for the IR sensing.
BIT 5
BIT 7
BIT 6
0
1
0
1
0
1
REG NAME
COMMAND
DATA
DATA
TABLE 2. WRITE ONLY REGISTERS
TABLE 4. MEASUREMENT MODE
Ambient light sensing
Infrared light sensing
sync_I
Power-down the device
Enable the device
One-time measurement
Continuous measurement
MSB
LSB
NAME
TABLE 5. LIGHT SENSING
TABLE 3. ENABLE
2
C
D15
EN
D7
7
Writing a logic 1 to this address bit
ends the current ADC-integration
and starts another. Used only with
External Timing Mode.
5
FUNCTIONS/DESCRIPTION
OPERATION
OPERATION
OPERATION
MODE
D14
D6
6
LIGHT
D13
D5
5
TABLE 1. REGISTER SET
ISL29020
RES2
D12
D4
4
BIT
4. Timing Mode and Resolution: Bits 4, 3 and 2. These three
BITS 4:3:2
With Bit 4 set to 0, the device is configured to run in the
Internal-Timing mode. For example, the command register
content should be 1xx000xx to request 16-bit ADC in the
internal-timing mode.
With Bit 4 set to 1, the device is configured to run in the
External-Timing mode. For the external timing, the command
1xx101xx needs to be sent to request the Timer data, the
number of clock cycles counted within the duration between
the two sync pulses (refer to Table 2). The Timer count is
read from register 01h (LSB) and 02h (MSB). The command
1xx100xx needs to be sent to request the ADC conversion.
The ADC data is also read from register 01h (LSB) and 02h
(MSB).
Bits 3 and 2 determine the number of clock cycles per
conversion in the Internal-Timing mode. Changing the
number of clock cycles does more than just change the
resolution of the device. It also changes the integration
time, which the ADC uses to sample the photodiode
current signal for a measurement.
bits determine whether the integration time is done
internally or externally, and the number of bits for ADC. In
Internal Timing Mode, integration time is determined by
an internal oscillator (f
counter inside the ADC. In External Timing Mode, the
integration time is determined by the time between two
consecutive sync_I
RES1
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
D11
D3
3
TABLE 6. TIMING MODE AND RESOLUTION
Internal Timing, 16-bit ADC data output
Internal Timing, 12-bit ADC data output
Internal Timing, 8-bit ADC data output
Internal Timing, 4-bit ADC data output
External Timing, ADC data output
External Timing, Timer data output
Reserved
Reserved
RES0
D10
D2
2
2
C pulse commands.
OSC
RANGE1
D1
D9
1
) and the n-bit (n = 4, 8, 12, 16)
MODE
RANGE0
D0
D8
0
August 20, 2009
DEFAULT
00h
00h
00h
FN6505.1

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