CRD42L51 Cirrus Logic Inc, CRD42L51 Datasheet - Page 57

• Manufacturer Part Number: CRD42L51
• Description: Ref Bd Low-voltage Stereo Codec
• Manufacturer: Cirrus Logic Inc

DS679F1
6.8
HP_GAIN2
7
DAC Output Control (Address 08h)
Headphone Analog Gain (HP_GAIN[2:0])
Default: 011
Function:
These bits select the gain multiplier for the headphone/line outputs. See
tics” on page 18
DAC Single Volume Control (DAC_SNGVOL)
Default: 0
Function:
The individual channel volume levels are independently controlled by their respective Volume Control reg-
isters when this function is disabled. When enabled, the volume on all channels is determined by the AOU-
TA Volume Control register and the AOUTB Volume Control register is ignored.
PCMX Invert Signal Polarity (INV_PCMX)
Default: 0
0 - Disabled
1 - Enabled
Function:
When enabled, this bit will invert the signal polarity of the PCM x channel.
DACX Channel Mute (DACX_MUTE)
Default: 0
0 - Disabled
1 - Enabled
Function:
The output of channel x DAC will mute when enabled. The muting function is affected by the DACx Soft and
Zero Cross bits (DACx_SZC[1:0]).
HP_GAIN[2:0]
000
001
010
011
100
101
110
111
HP_GAIN1
6
and
Gain Setting
“Headphone Output Power Characteristics” on page
HP_GAIN0
0.3959
0.4571
0.6047
0.7099
0.8399
1.0000
1.1430
0.5111
5
SNGVOL
DAC_
4
INV_PCMB
3
INV_PCMA
2
“Line Output Voltage Characteris-
19.
DACB_MUTE DACA_MUTE
1
CS42L51
0
57