CS8420-DSZR Cirrus Logic Inc, CS8420-DSZR Datasheet - Page 89

• Manufacturer Part Number: CS8420-DSZR
• Description: IC,Digital Audio Sample Rate Converter,SOP,28PIN
• Manufacturer: Cirrus Logic Inc

DS245F4
16.3.2 Locking to the RXP/RXN Receiver Inputs
16.3.3 Locking to the ILRCK Input
CS8420 parts that are configured to lock to only the RXP/RXN receiver inputs should use the external
PLL component values listed in
have the highest corner frequency jitter attenuation curve, take the shortest time to lock, and offer the best
output jitter performance.
* Parts used in applications that are required to pass the AES3 or IEC60958-4 specification for receiver
jitter tolerance should use these component values. Please note that the AES3 and IEC60958 specifica-
tions do not have allowances for locking to sample rates less than 32 kHz or for locking to the ILRCK input.
Also note that many factors can affect jitter performance in a system. Please follow the circuit and layout
recommendations outlined previously.
CS8420 parts that are configured to lock to the ILRCK input should use the external PLL component val-
ues listed in
these values. Values listed for the 32 to 96 kHz Fs range will have the highest corner frequency jitter at-
tenuation curve, take the shortest time to lock, and offer the best output jitter performance.
Revision
Revision
Revision
D1
D1
D
D
D1
D1
D
D
Table
Fs Range
20. Note that parts that need to lock to both ILRCK and RXP/RXN should use
8 to 96
8 to 96
R
R
(kHz)
32-96
32-96
FILT
FILT
Table 19. Locking to RXP/RXN - Fs = 32 to 96 kHz*
0.909
Table 18. Locking to RXP/RXN - Fs = 8 to 96 kHz
0.4
3.0
1.6
(kΩ)
(kΩ)
Table 20. Locking to the ILRCK Input
R
FILT
Table 18
0.3
1.3
5.1
0.6
(kΩ) C
C
C
FILT
FILT
0.047
0.47
0.33
1.8
and
FILT
(μF)
(μF)
0.15
0.22
2.7
1.0
Table
(μF) C
19. Values listed for the 32 to 96 kHz Fs range will
C
C
RIP
RIP
RIP
100
3.9
62
22
2.2
4.7
33
47
(nF) PLL Lock Time (ms)
(nF)
(nF)
PLL Lock Time (ms)
PLL Lock Time (ms)
120
120
70
70
56
60
35
35
CS8420
89